公开(公告)号：US09000494B2

公开(公告)日：2015-04-07

申请号：US13624307

申请日：2012-09-21

Applicant: International Business Machines Corporation

Inventor： Michael A. Guillorn ,  Fei Liu ,  Ying Zhang

IPC: H01L29/84 ,  B81C1/00 ,  H01H1/00

CPC classification number: B81C1/00396 ,  B81B2201/018 ,  B81B2207/015 ,  B81C1/00476 ,  B81C1/00801 ,  B81C2201/0132 ,  H01H1/0036 ,  H01H1/0094

Abstract: A structure includes a silicon layer disposed on a buried oxide layer that is disposed on a substrate; at least one transistor device formed on or in the silicon layer, the at least one transistor having metallization; a released region of the silicon layer disposed over a cavity in the buried oxide layer; a back end of line (BEOL) dielectric film stack overlying the silicon layer and the at least one transistor device; a nitride layer overlying the BEOL dielectric film stack; a hard mask formed as a layer of hafnium oxide overlying the nitride layer; and an opening made through the layer of hafnium oxide, the layer of nitride and the BEOL dielectric film stack to expose the released region of the silicon layer disposed over the cavity in the buried oxide layer. The hard mask protects the underlying material during a MEMS/NEMS HF vapor release procedure.

Abstract translation: 一种结构包括设置在设置在基板上的掩埋氧化物层上的硅层; 至少一个晶体管器件形成在硅层上或硅层中，所述至少一个晶体管具有金属化; 所述硅层的释放区域设置在所述掩埋氧化物层中的空腔上方; 覆盖所述硅层和所述至少一个晶体管器件的后端（BEOL）电介质膜堆叠; 覆盖在BEOL电介质膜叠层上的氮化物层; 形成为覆盖氮化物层的氧化铪层的硬掩模; 以及通过氧化铪层，氮化物层和BEOL电介质膜叠层形成的开口，以暴露位于掩埋氧化物层中的空腔上方的硅层的释放区域。 在MEMS / NEMS HF蒸汽释放过程中，硬掩模保护底层材料。

公开(公告)号：US08912652B2

公开(公告)日：2014-12-16

申请号：US13906441

申请日：2013-05-31

Applicant: Dongbu HiTek Co., Ltd.

Inventor： Ki Wan Bang

IPC: H01L23/00 ,  G01B11/14 ,  H01H35/14 ,  H01H35/02 ,  H01H1/16

CPC classification number: H01L24/11 ,  B81B2201/018 ,  B81B2201/0271 ,  B81B2203/033 ,  B81C1/00182 ,  G01B11/14 ,  H01H1/16 ,  H01H35/02 ,  H01H35/142 ,  H01L24/13 ,  H01L2924/1461 ,  H01L2924/0001

Abstract: Embodiments relate to a method for manufacturing a semiconductor device including at least one of: (1) Forming a lower electrode pattern on a substrate. (2) Forming an etch stop film on/over the lower electrode pattern. (3) Forming a first interlayer insulating layer on/over the etch stop film. (4) Forming an upper electrode pattern on/over the first interlayer insulating layer. (5) Forming a second interlayer insulating layer on/over the upper electrode pattern. (6) Forming an etch blocking layer positioned between the lower electrode pattern and the upper electrode pattern which passes through the second interlayer insulating layer and the first interlayer insulating layer. (7) Forming a cavity which exposes a side of the etch blocking layer by etching the second interlayer insulating layer and the first interlayer insulating layer. (8) Forming a contact ball in the cavity.

Abstract translation: 实施例涉及一种用于制造半导体器件的方法，所述半导体器件包括以下至少一个：（1）在衬底上形成下电极图案。 （2）在下电极图案之上/之上形成蚀刻停止膜。 （3）在蚀刻停止膜上/之上形成第一层间绝缘层。 （4）在第一层间绝缘层上形成上电极图案。 （5）在上电极图案之上/之上形成第二层间绝缘层。 （6）形成位于通过第二层间绝缘层和第一层间绝缘层的下电极图案和上电极图案之间的蚀刻阻挡层。 （7）通过蚀刻第二层间绝缘层和第一层间绝缘层，形成露出蚀刻阻挡层的一侧的空腔。 （8）在空腔中形成接触球。

公开(公告)号：US08907720B2

公开(公告)日：2014-12-09

申请号：US14144095

申请日：2013-12-30

Applicant: Huawei Device Co., Ltd.

Inventor： Xiong Yang ,  Bocheng Cao ,  Lei Wang

IPC: H01L25/00 ,  H01H21/18 ,  H01H11/00

CPC classification number: B81B3/0072 ,  B81B3/001 ,  B81B2201/014 ,  B81B2201/018 ,  H01G5/16 ,  H01H59/0009

Abstract: A capacitive switch includes: a first conductive cantilever, a second conductive cantilever, a substrate, a coplanar waveguide arranged on the substrate, the coplanar waveguide includes a first conductor configured to transmit an electrical signal, a second conductor and a third conductor are arranged as ground wires on two sides of the first conductor; an insulation medium layer is arranged on the first conductor, a conducting layer is arranged on the insulation medium layer; the first conductive cantilever is connected to the second conductor by using a first fixed end, the second conductive cantilever is connected to the third conductor by using a second fixed end; when a direct-current signal is transmitted on the capacitive switch, a first free end of the first conductive cantilever and a second free end of the second conductive cantilever contact the conducting layer.

Abstract translation: 电容开关包括：第一导电悬臂，第二导电悬臂，衬底，布置在衬底上的共面波导，共面波导包括被配置为传输电信号的第一导体，第二导​​体和第三导体被布置为 第一导体两侧接地线; 绝缘介质层布置在第一导体上，导电层设置在绝缘介质层上; 第一导电悬臂通过使用第一固定端连接到第二导体，第二导​​电悬臂通过使用第二固定端连接到第三导体; 当在电容性开关上传输直流信号时，第一导电悬臂的第一自由端和第二导电悬臂的第二自由端接触导电层。

公开(公告)号：US08786130B1

公开(公告)日：2014-07-22

申请号：US13975216

申请日：2013-08-23

Applicant: INOSO, LLC

Inventor： Kiyoshi Mori ,  Ziep Tran ,  Giang T. Dao ,  Michael E. Ramon

IPC: H02J1/00 ,  B81B3/00 ,  H03K3/01

CPC classification number: B81C1/0023 ,  B81B2201/018 ,  B81B2207/012 ,  B81B2207/053 ,  H01H59/0009 ,  Y10T307/461

Abstract: A method of forming an electromechanical power switch for controlling power to integrated circuit (IC) devices and related devices. At least some of the illustrative embodiments are methods comprising forming at least one IC device on a front surface of a semiconductor substrate. The at least one IC device includes at least one circuit block and at least one power switch circuit. A dielectric layer is deposited on the IC device, and first and second electromechanical power switches are formed on the dielectric layer. The first power switch gates a voltage to the circuit block and the second power switch gates the voltage to the IC device. The first power switch is actuated by the power switch circuit, and the voltage to the circuit block is switched off. Alternatively, the second power switch is actuated by the power switch circuit, and the voltage to the IC device is switched off.

Abstract translation: 一种形成用于控制集成电路（IC）装置和相关装置的电力的机电电源开关的方法。 示例性实施例中的至少一些是包括在半导体衬底的前表面上形成至少一个IC器件的方法。 所述至少一个IC器件包括至少一个电路块和至少一个功率开关电路。 电介质层沉积在IC器件上，第一和第二机电电源开关形成在电介质层上。 第一电源开关对电路块施加电压，并且第二电源开关将电压门控到IC器件。 第一电源开关由电源开关电路驱动，电路块的电压关闭。 或者，第二电源开关由电源开关电路驱动，并且IC器件的电压被切断。

公开(公告)号：US20140183014A1

公开(公告)日：2014-07-03

申请号：US14202437

申请日：2014-03-10

Applicant: FUJITSU LIMITED

Inventor： Hiroaki INOUE ,  Xiaoyu Mi

IPC: H01H1/00 ,  H01H59/00 ,  B81B3/00

CPC classification number: H01H1/0036 ,  B81B3/0072 ,  B81B3/0097 ,  B81B2201/018 ,  B81B2203/0118 ,  H01G5/16 ,  H01H59/0009

Abstract: On seed metal layer of first metal, pedestal and counter electrode are formed of second metal by plating, adjacent to free space region. The free space region is filled with first sacrificial layer. By using resist pattern, second sacrificial metal layer is formed, extending from the first sacrificial layer to a portion of the pedestal, and lower structure of third metal is formed on the second sacrificial layer, by contiguous plating, exposing a portion of the pedestal not formed with the second sacrificial layer, the third metal having composition and thermal expansion coefficient equivalent to the second metal. Upper structure of fourth metal having composition and thermal expansion coefficient equivalent to the second and third metals is formed on the pedestal and the lower structure by plating. The first and second sacrificial layers are removed, leaving an electric equipment with a movable portion.

Abstract translation: 在第一金属的种子金属层上，基座和对电极通过电镀形成第二金属，邻近自由空间区域。 自由空间区域填充有第一牺牲层。 通过使用抗蚀剂图案，形成从第一牺牲层延伸到基座的一部分的第二牺牲金属层，并且通过连续的电镀在第二牺牲层上形成第三金属的下部结构，使基座的一部分不暴露 形成有第二牺牲层，第三金属具有与第二金属相当的组成和热膨胀系数。 具有与第二和第三金属相当的组成和热膨胀系数的第四金属的上部结构通过电镀形成在基座和下部结构上。 去除第一和第二牺牲层，留下具有可移动部分的电气设备。

公开(公告)号：US20140175645A1

公开(公告)日：2014-06-26

申请号：US13906441

申请日：2013-05-31

Applicant: Dongbu HiTek Co., Ltd.

Inventor： Ki Wan Bang

IPC: H01L23/00

CPC classification number: H01L24/11 ,  B81B2201/018 ,  B81B2201/0271 ,  B81B2203/033 ,  B81C1/00182 ,  G01B11/14 ,  H01H1/16 ,  H01H35/02 ,  H01H35/142 ,  H01L24/13 ,  H01L2924/1461 ,  H01L2924/0001

Abstract: Embodiments relate to a method for manufacturing a semiconductor device including at least one of: (1) Forming a lower electrode pattern on a substrate. (2) Forming an etch stop film on/over the lower electrode pattern. (3) Forming a first interlayer insulating layer on/over the etch stop film. (4) Forming an upper electrode pattern on/over the first interlayer insulating layer. (5) Forming a second interlayer insulating layer on/over the upper electrode pattern. (6) Forming an etch blocking layer positioned between the lower electrode pattern and the upper electrode pattern which passes through the second interlayer insulating layer and the first interlayer insulating layer. (7) Forming a cavity which exposes a side of the etch blocking layer by etching the second interlayer insulating layer and the first interlayer insulating layer. (8) Forming a contact ball in the cavity.

Abstract translation: 实施例涉及一种用于制造半导体器件的方法，所述半导体器件包括以下至少一个：（1）在衬底上形成下电极图案。 （2）在下电极图案之上/之上形成蚀刻停止膜。 （3）在蚀刻停止膜上/之上形成第一层间绝缘层。 （4）在第一层间绝缘层上形成上电极图案。 （5）在上电极图案之上/之上形成第二层间绝缘层。 （6）形成位于通过第二层间绝缘层和第一层间绝缘层的下电极图案和上电极图案之间的蚀刻阻挡层。 （7）通过蚀刻第二层间绝缘层和第一层间绝缘层，形成露出蚀刻阻挡层的一侧的空腔。 （8）在空腔中形成接触球。

公开(公告)号：US20140125431A1

公开(公告)日：2014-05-08

申请号：US14071173

申请日：2013-11-04

Applicant: RF Micro Devices, Inc.

Inventor： Kushal Bhattacharjee

IPC: H01L41/09 ,  H01G5/18 ,  B81B7/02 ,  H03H9/46

CPC classification number: H01G5/18 ,  B81B3/0086 ,  B81B2201/018 ,  B81B2201/0271 ,  B81B2201/032 ,  H03H9/02275 ,  H03H9/02409 ,  H03H9/2405 ,  H03H9/2463 ,  H03H9/462 ,  H03H9/467 ,  H03H2009/241

Abstract: A MEMS device includes a substrate, one or more anchors formed on a first surface of the substrate, and a piezoelectric layer suspended over the first surface of the substrate by the one or more anchors. Notably, the piezoelectric layer is a bimorph including a first bimorph layer and a second bimorph layer. A first electrode may be provided on a first surface of the piezoelectric layer facing the first surface of the substrate, such that the first electrode is in contact with the first bimorph layer of the piezoelectric layer. A second electrode may be provided on a second surface of the piezoelectric layer opposite the substrate, such that the second electrode is in contact with the second bimorph layer of the piezoelectric layer. The second electrode may include a first conducting section and a second conducting section, which are inter-digitally dispersed on the second surface.

Abstract translation: MEMS器件包括衬底，形成在衬底的第一表面上的一个或多个锚固体和通过一个或多个锚固件悬挂在衬底的第一表面上的压电层。 值得注意的是，压电层是包括第一双晶片层和第二双晶片层的双晶片。 第一电极可以设置在面对基板的第一表面的压电层的第一表面上，使得第一电极与压电层的第一双压电晶片层接触。 第二电极可以设置在与衬底相对的压电层的第二表面上，使得第二电极与压电层的第二双压电晶片层接触。 第二电极可以包括第一导电部分和第二导电部分，其在数字上分散在第二表面上。

公开(公告)号：US08681409B2

公开(公告)日：2014-03-25

申请号：US13566053

申请日：2012-08-03

Applicant: David J. Frank ,  Guy Cohen

Inventor： David J. Frank ,  Guy Cohen

IPC: G02B26/08

CPC classification number: B81B3/0072 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2207/053 ,  B81C2201/0167

Abstract: A nonvolatile nano-electromechanical system device is provided and includes a cantilever structure, including a beam having an initial shape, which is supported at one end thereof by a supporting base and a beam deflector, including a phase change material (PCM), disposed on a portion of the beam in a non-slip condition with a material of the beam, the PCM taking one of an amorphous phase or a crystalline phase and deflecting the beam from the initial shape when taking the crystalline phase.

Abstract translation: 提供了非易失性纳米机电系统装置，其包括悬臂结构，其包括具有初始形状的梁，所述梁的一端由支撑基座支撑，并且梁偏转器包括相变材料（PCM），所述相变材料 光束的一部分处于防滑状态，具有光束的材料，PCM采取非晶相或结晶相中的一种，并且在获取结晶相时将光束从初始形状偏转。

公开(公告)号：US20140054728A1

公开(公告)日：2014-02-27

申请号：US13591771

申请日：2012-08-22

Applicant: Jeffrey C. Maling ,  Anthony K. Stamper ,  Dana R. DeReus ,  Arthur S. Morris, III

Inventor： Jeffrey C. Maling ,  Anthony K. Stamper ,  Dana R. DeReus ,  Arthur S. Morris, III

IPC: H01L29/84 ,  G06F17/50 ,  H01L21/02

CPC classification number: B81B3/0072 ,  B81B2201/018 ,  B81B2203/0118 ,  B81C1/00333 ,  B81C1/00825 ,  B81C2203/0136 ,  B81C2203/0145 ,  H01H1/0036 ,  H01L23/34 ,  H01L29/84 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming at least one Micro-Electro-Mechanical System (MEMS) cavity. The method for forming the cavity further includes forming at least one first vent hole of a first dimension which is sized to avoid or minimize material deposition on a beam structure during sealing processes. The method for forming the cavity further includes forming at least one second vent hole of a second dimension, larger than the first dimension.

Abstract translation: 公开了微机电系统（MEMS）结构，制造方法和设计结构。 该方法包括形成至少一个微机电系统（MEMS）空腔。 用于形成空腔的方法还包括形成至少一个第一尺寸的第一通气孔，其尺寸设计成在密封过程中避免或最小化在梁结构上的材料沉积。 形成空腔的方法还包括形成大于第一尺寸的第二尺寸的至少一个第二通气孔。

公开(公告)号：US08420427B2

公开(公告)日：2013-04-16

申请号：US11492671

申请日：2006-07-25

Applicant: Shawn Jay Cunningham ,  Dana Richard DeReus ,  Subham Sett ,  John Gilbert

Inventor： Shawn Jay Cunningham ,  Dana Richard DeReus ,  Subham Sett ,  John Gilbert

IPC: H01L21/00

CPC classification number: B81B3/0024 ,  B81B3/0051 ,  B81B2201/014 ,  B81B2201/018 ,  B81B2203/0118 ,  B81B2203/04 ,  B81B2207/07 ,  B81C1/0015 ,  B81C2201/0107 ,  B81C2201/0108 ,  B81C2201/0109 ,  H01H1/04 ,  H01H1/504 ,  H01H59/0009 ,  H01H61/04 ,  H01H2001/0042 ,  H01H2001/0063 ,  H01H2001/0089 ,  H01H2059/0072 ,  H01H2061/006 ,  H01L23/3735 ,  H01L23/522 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/09701 ,  H02N1/006 ,  H02N10/00 ,  Y10T29/49222 ,  H01L2924/00

Abstract: Methods for Implementation of a Switching Function in a Microscale Device and for Fabrication of a Microscale Switch. According to one embodiment, a method is provided for implementing a switching function in a microscale device. The method can include providing a stationary electrode and a stationary contact formed on a substrate. Further, a movable microcomponent suspended above the substrate can be provided. A voltage can be applied between the between a movable electrode of the microcomponent and the stationary electrode to electrostatically couple the movable electrode with the stationary electrode, whereby the movable component is deflected toward the substrate and a movable contact moves into contact with the stationary contact to permit an electrical signal to pass through the movable and stationary contacts. A current can be applied through the first electrothermal component to produce heating for generating force for moving the microcomponent.

Abstract translation: 用于实现微尺度装置中的切换功能以及用于制造微型开关的方法。 根据一个实施例，提供了一种用于在微型设备中实现切换功能的方法。 该方法可以包括提供固定电极和形成在基板上的固定触点。 此外，可以提供悬浮在基板上方的可移动微型部件。 可以在微型组件的可动电极和固定电极之间施加电压，以使可动电极与固定电极静电耦合，由此可动部件朝向基板偏转，并且可动触点移动到与固定触点接触 允许电信号通过可移动和固定触点。 可以通过第一电热部件施加电流以产生用于产生用于移动微型部件的力的加热。