公开(公告)号：US20180164579A1

公开(公告)日：2018-06-14

申请号：US15838843

申请日：2017-12-12

Applicant: STMicroelectronics Ltd

Inventor： Elik Haran ,  Offir Duvdevany ,  Naomi Petrushevsky

IPC: G02B26/08 ,  G02B26/10 ,  H02P25/032 ,  G01R19/04

CPC classification number: G02B26/085 ,  G01R19/04 ,  G02B26/0833 ,  G02B26/105 ,  H02P25/032

Abstract: Disclosed herein is an electronic device that includes a peak detection circuit configured to receive a mirror sense signal from an oscillating mirror and to generate peak information for a mirror period as a function thereof. The electronic device includes a mirror control circuit that estimates an opening angle of the oscillating mirror as a function of the peak information, generates a control signal for the oscillating mirror as a function of the estimated opening angle, and resets the peak detection circuit at an end of the mirror period.

公开(公告)号：US20170318271A1

公开(公告)日：2017-11-02

申请号：US15458192

申请日：2017-03-14

Applicant: STMicroelectronics Ltd

Inventor： Sason Sourani

IPC: H04N9/31 ,  G02B27/14

CPC classification number: H04N9/3194 ,  G02B27/141 ,  H04N9/3129 ,  H04N9/3158 ,  H04N9/3161 ,  H04N9/3182 ,  H04N9/3185

Abstract: A color calibration device for a laser scanning apparatus includes a compensation unit configured to electronically compensate for positional errors of the three-color laser source. The compensation unit includes an emitted light detector configured to measure a power of an emitted light beam. A calibration unit coupled to the emitted light detector has a controller configured to generate a quantity correction value for the three-color laser source. A laser source control element is configured to generate a control quantity for the three-color laser source, based on the quantity correction value. A dominant color detector is configured to detect any dominant color in the light beam being projected and actuate the controller for the dominant color.

公开(公告)号：US20170285327A1

公开(公告)日：2017-10-05

申请号：US15280691

申请日：2016-09-29

Applicant: STMicroelectronics Ltd

Inventor： Offir Duvdevany ,  Dadi Sharon ,  Sason Sourani

IPC: G02B26/08 ,  G02B26/10 ,  G03B21/00 ,  G02B7/182

CPC classification number: G02B26/0833 ,  G02B7/1821 ,  G02B26/0841 ,  G02B26/105 ,  G03B21/008

Abstract: The method for controlling an angular position of a MEMS mirror, includes: applying a first driving moment to the MEMS mirror to generate a rotational scanning movement of the mirror; and, at a zooming instant, applying a second driving moment to the MEMS mirror, wherein the second driving moment is equal to the first driving moment plus an extra moment. The extra moment may be a DC offset. After a transient period of time from zooming instant, a third driving moment M2=k{dot over (θ)}2t is applied. The first and third driving moment are variable linearly with time. The driving moments are applied to torsional springs of the mirror.

公开(公告)号：US08748291B2

公开(公告)日：2014-06-10

申请号：US13629157

申请日：2012-09-27

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Ltd (Malta)

Inventor： Mark Anthony Azzopardi ,  Conrad Cachia ,  Stefano Pozzi

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/00 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: B81C99/004 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method for testing a strip of MEMS devices, the MEMS devices including at least a respective die of semiconductor material coupled to an internal surface of a common substrate and covered by a protection material; the method envisages: detecting electrical values generated by the MEMS devices in response to at least a testing stimulus; and, before the step of detecting, at least partially separating contiguous MEMS devices in the strip. The step of separating includes defining a separation trench between the contiguous MEMS devices, the separation trench extending through the whole thickness of the protection material and through a surface portion of the substrate, starting from the internal surface of the substrate.

Abstract translation: 一种用于测试MEMS器件条的方法，所述MEMS器件至少包括耦合到公共衬底的内表面并由保护材料覆盖的半导体材料的相应裸片; 该方法设想：响应于至少一个测试刺激来检测由MEMS器件产生的电值; 并且在所述检测步骤之前，至少部分地分离所述条带中的连续的MEMS器件。 分离步骤包括在连续的MEMS器件之间限定分离沟槽，分离沟槽从衬底的内表面开始延伸穿过保护材料的整个厚度并穿过衬底的表面部分。

公开(公告)号：US20130032936A1

公开(公告)日：2013-02-07

申请号：US13648213

申请日：2012-10-09

Applicant: STMICROELECTRONICS LTD (MALTA)

Inventor： Kevin Formosa

IPC: H01L23/12 ,  H01L21/50

CPC classification number: B81B7/0074 ,  B81B7/0061 ,  B81B2201/0257 ,  B81B2207/012 ,  B81C1/00309 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4824 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R2201/003 ,  H01L2924/00014

Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.

Abstract translation: 一种封装的MEMS器件，其中至少两个支撑结构彼此堆叠并且由支撑层和彼此耦合并限定相应室的壁层形成。 第一支撑结构的腔室由第二支撑结构的支撑层向上限定。 第一和第二骰子容纳在由第一支撑结构的相应支撑层承载的相应的腔室中。 第二支撑结构的支撑层具有允许电线连接直接耦合第一和第二裸片的通孔。 耦合到第二支撑结构的盖基板封闭第二支撑结构的室。

公开(公告)号：US20040203237A1

公开(公告)日：2004-10-14

申请号：US10789829

申请日：2004-02-27

Applicant: STMICROELECTRONICS LTD.

Inventor： Brian Laffoley

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H05K1/141 ,  H01L24/05 ,  H01L24/16 ,  H01L2224/16058 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16238 ,  H01L2924/14 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/09427 ,  H05K2201/10727 ,  Y02P70/613 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49169 ,  H01L2924/00

Abstract: A method of mounting an electronic component having at least one contact extending across a part of its undersurface may include providing a support smaller in area than the undersurface of the component and having a contact pad for connection to the contact. The contact pad may have a first portion extending across an upper surface of the support adjacent one edge and a second portion extending from the edge across a side surface of the support. The method may also include positioning the electronic component and the support with the undersurface of the component adjacent the upper surface of the support. This is done so that the first portion of the contact pad is aligned with and spaced apart from a first portion of the contact, and the second portion of the contact pad is aligned with and disposed inwardly of a second portion of the contact.

Abstract translation: 安装具有延伸穿过其下表面的一部分的至少一个触点的电子部件的方法可以包括提供比部件的下表面更小的面积的支撑件，并具有用于连接到触头的接触垫。 接触垫可以具有延伸穿过支撑件的上表面邻近一个边缘的第一部分和从边缘延伸穿过支撑件的侧表面的第二部分。 该方法还可以包括将电子部件和支撑件定位成邻近支撑件的上表面的部件的下表面。 这样做使得接触垫的第一部分与接触件的第一部分对齐并且与接触垫的第一部分间隔开，并且接触垫的第二部分与接触件的第二部分对齐并设置在接触件的第二部分的内侧。

公开(公告)号：US20030231252A1

公开(公告)日：2003-12-18

申请号：US10325646

申请日：2002-12-18

Applicant: STMicroelectronics Ltd

Inventor： Keith Findlater ,  Jonathan Ephriam David Hurwitz

IPC: H04N005/335

CPC classification number: H04N5/363 ,  H04N5/3575 ,  H04N5/374 ,  H04N5/378

Abstract: A solid state image sensor may include a pixel array of an active pixel type including three transistors and a photodiode for each pixel. Pixel reset values may be read out one row at a time and stored in a frame store. Pixel signal values may also be read out a row at a time. The stored reset values may be subtracted, for example, by a read/write/modify circuit to remove kTC noise. The readout of the reset and signal values may be interleaved, and the offset between read and reset for each row may be selected to control frame exposure.

Abstract translation: 固态图像传感器可以包括每个像素包括三个晶体管和光电二极管的有源像素类型的像素阵列。 像素复位值可以一次读出一行并存储在帧存储器中。 像素信号值也可以一次读出一行。 可以例如通过读/写/修改电路减去存储的复位值以去除kTC噪声。 可以对复位和信号值的读出进行交织，并且可以选择每行的读取和复位之间的偏移量以控制帧曝光。

公开(公告)号：US20020191091A1

公开(公告)日：2002-12-19

申请号：US10156721

申请日：2002-05-28

Applicant: STMicroelectronics Ltd

Inventor： Jeff Raynor

IPC: H04N005/217

CPC classification number: H04N1/32128 ,  H04N2201/3205 ,  H04N2201/3215

Abstract: A method is for generating a key from the fixed pattern noise (FPN) of a CMOS image sensor to be used in generating a digital authentication signature. The key may be generated by temporarily disabling the FPN cancellation circuit that is conventionally included in the system, and generating a substantially nullblacknull image to produce a digitized FPN signal. The key may then be generated from characteristics of the FPN, such as by comparing pairs of pixels, for example.

Abstract translation: 一种用于从用于产生数字认证签名的CMOS图像传感器的固定模式噪声（FPN）产生密钥的方法。 可以通过临时禁用系统中常规包括的FPN消除电路并产生基本上“黑”的图像以产生数字化的FPN信号来产生密钥。 然后，可以例如通过比较像素对，从FPN的特征产生密钥。

公开(公告)号：US20020175703A1

公开(公告)日：2002-11-28

申请号：US10145390

申请日：2002-05-14

Applicant: STMicroelectronics Ltd.

Inventor： Ankur Bal

IPC: H03K019/173

CPC classification number: H03K19/17728

Abstract: A look-up table circuit includes address decoder circuitry that includes circuitry for utilizing the address decoder circuitry for producing secondary functions concurrently with operation of the address decoding operations. This eliminates or reduces secondary functions.

Abstract translation: 查找表电路包括地址解码器电路，其包括用于利用地址解码器电路与地址解码操作的操作同时产生辅助功能的电路。 这消除或减少了次要功能。

公开(公告)号：US20020091894A1

公开(公告)日：2002-07-11

申请号：US09917226

申请日：2001-07-27

Applicant: STMicroelectronics Ltd.

Inventor： Anurag Garg

IPC: G06F012/00 ,  G06F012/14 ,  G06F012/16 ,  G06F013/00 ,  G06F013/28

CPC classification number: G11C17/16 ,  G06F2213/0038 ,  G11C11/5692

Abstract: A high bit density, high speed, via and metal BE type programmable ROM core cell architecture for storing large amounts of non-volatile data and having a relatively fast turn around time is provided. The ROM core cell may include memory cells organized in rows and columns where each of the memory cells includes three transistors and two bit lines. The arrangement between the three transistors and two bit lines may be such that each of the memory cells is capable of storing four bits of data.

Abstract translation: 提供了用于存储大量非易失性数据并且具有相对较快的周转时间的高比特密度，高速度，通孔和金属BE型可编程ROM核心单元架构。 ROM核心单元可以包括以行和列组织的存储单元，其中每个存储单元包括三个晶体管和两个位线。 三个晶体管和两个位线之间的布置可以使得每个存储器单元能够存储四位数据。