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公开(公告)号：KR1020090110989A
公开(公告)日：2009-10-26
申请号：KR1020080036510
申请日：2008-04-21
Applicant: 삼성전자주식회사 , 연세대학교 산학협력단
IPC: G11C7/10
CPC classification number: G11C7/1051 , G11C7/1057 , G11C7/106 , G11C7/1063 , H04N5/222
Abstract: PURPOSE: A semiconductor device having high-speed driver buffer is provided to transfer a signal through the signal line at high speed due to the parasitic resistance and parasitic capacitor. CONSTITUTION: The semiconductor device having high-speed driver buffer comprises the driver buffer, the control signal generator, and the control signal generator. The control signal generator transmits the control signal the first driver buffer among driver buffers. The buffered control signal output outputs the buffered control signal for controlling each switching operation of the switching circuit.
Abstract translation: 目的：提供一种具有高速驱动器缓冲器的半导体器件，用于通过寄生电阻和寄生电容器高速传输信号通过信号线。 构成：具有高速驱动器缓冲器的半导体器件包括驱动器缓冲器，控制信号发生器和控制信号发生器。 控制信号发生器将驱动器缓冲器中的第一驱动器缓冲器的控制信号发送。 缓冲控制信号输出输出缓冲的控制信号，用于控制开关电路的每个开关操作。
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公开(公告)号：KR1020080044103A
公开(公告)日：2008-05-20
申请号：KR1020060112968
申请日：2006-11-15
Applicant: 삼성전자주식회사
CPC classification number: H04N5/235 , H04N5/2355
Abstract: An image pickup device is provided to photograph an image using W pixels and photograph the image several times in a case of the W pixels, thereby improving the sensitivity of the image and solving a problem that image information is lost as the output of a sampling DAC(Digital Analog Converter) is saturated. An image is photographed through a first W pixel(W1) for an mT time. The image is photographed through a second W pixel(W2) for a (1-m)T time. The mT time is short so that the W pixels can not be saturated. The image is photographed for color pixels(Red and Blue pixels). While the image is photographed one time using the R and B pixels for the total T time, the image is photographed twice by using the W pixels.
Abstract translation: 提供一种图像拾取装置，用于在W像素的情况下使用W像素拍摄图像并拍摄图像数次，从而提高图像的灵敏度并解决图像信息丢失的问题，作为采样DAC的输出 （数字模拟转换器）饱和。 通过第一W像素（W1）对mT时间拍摄图像。 通过第二W像素（W2）对（1-m）T时间拍摄图像。 mT时间短，W像素不能饱和。 为彩色像素拍摄图像（红色和蓝色像素）。 当使用R和B像素对于总T时间拍摄一次图像时，通过使用W像素来拍摄图像两次。
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公开(公告)号：KR1020080035910A
公开(公告)日：2008-04-24
申请号：KR1020060102565
申请日：2006-10-20
Applicant: 삼성전자주식회사
CPC classification number: H03F3/005 , H03F3/45475 , H03F2203/45514 , H03F2203/45551
Abstract: A ratio-independent switched capacitor amplifier with a double precision gain and an operation method thereof are provided to obtain the double gain through one amplification process and one sampling process, thereby processing an input signal at high speed. A ratio-independent switched capacitor amplifier comprises a first sampling circuit(20), a second sampling circuit(30), and a differential amplification circuit(10). The first sampling circuit samples a first input voltage to a first sampling voltage, and doubles a level of the first sampling voltage for the section where the first input voltage is interrupted. The second sampling circuit samples a second input voltage to a second sampling voltage, and doubles a level of the second sampling voltage for the section where the second input voltage is interrupted. The differential amplification circuit outputs a difference between the first sampling voltage and the second sampling voltage.
Abstract translation: 提供了具有双精度增益的比率无关的开关电容放大器及其操作方法，以通过一个放大处理和一个采样处理来获得双增益，从而以高速处理输入信号。 比率无关的开关电容放大器包括第一采样电路（20），第二采样电路（30）和差分放大电路（10）。 第一采样电路将第一输入电压取样为第一采样电压，并将第一输入电压中断的部分的第一采样电压的电平加倍。 第二采样电路将第二输入电压采样到第二采样电压，并将第二输入电压中断的部分的第二采样电压的电平加倍。 差分放大电路输出第一采样电压和第二采样电压之间的差。
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公开(公告)号：KR1020080034687A
公开(公告)日：2008-04-22
申请号：KR1020060100950
申请日：2006-10-17
Applicant: 삼성전자주식회사
CPC classification number: H04N5/2256 , G01R19/16566 , H03F2200/234 , H03K19/20 , H03M1/12 , H03M1/66
Abstract: A ramp generator and a ramp signal generating method thereof are provided to generate a ramp signal of a proper index function even if the characteristic change of the detector occurs by calibrating inclination and curvature of the ramp signal in real time using a calibration circuit. A ramp generator(20) comprises a ramp signal generating circuit(100), and a calibration circuit(200). The ramp signal generating circuit generates a ramp signal which increases as an index function. The ramp signal generating circuit receives the ramp signal and calibrates inclination and curvature of the ramp signal in real time. The calibration circuit calibrates the ramp signal by comparing voltage differences between the ramp signal and a target ramp signal. The ramp signal generating circuit includes an OP amplifier, a resistor(R), a capacitor(C), a feedback resistor(Rf), and a variable resistor(Rv). A switch(Sw) is placed between an inversion input end of the OP amplifier and an output end of the OP amplifier.
Abstract translation: 提供斜坡发生器及其斜坡信号产生方法，以便即使通过使用校准电路实时校准斜坡信号的倾斜度和曲率来发生检测器的特性变化，也产生适当的指标函数的斜坡信号。 斜坡发生器（20）包括斜坡信号发生电路（100）和校准电路（200）。 斜坡信号发生电路产生作为指标函数而增加的斜坡信号。 斜坡信号发生电路接收斜坡信号并实时校准斜坡信号的倾斜度和曲率。 校准电路通过比较斜坡信号和目标斜坡信号之间的电压差来校准斜坡信号。 斜坡信号发生电路包括OP放大器，电阻器（R），电容器（C），反馈电阻器（Rf）和可变电阻器（Rv）。 开关（Sw）放置在OP放大器的反相输入端和OP放大器的输出端之间。
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公开(公告)号：KR100794310B1
公开(公告)日：2008-01-11
申请号：KR1020060115386
申请日：2006-11-21
Applicant: 삼성전자주식회사
IPC: H03F1/32
CPC classification number: H03H19/004 , H03M3/356 , H03M3/43 , H03M3/456
Abstract: A switched capacitor circuit and an amplifying method thereof are provided to remove the influence of offset voltage on an output stage by installing a capacitor in an input stage of an inverting amplifier. A switched capacitor circuit(20) includes an amplifier, a charging unit, an offset unit, and an amplifying unit. The charging unit is connected between an input node and a first node, and charges the charge corresponding to input voltage in response to a first signal. The offset unit is connected between the first node and an input stage of the amplifier, and maintains the charge corresponding to the offset voltage between the input stage and an output stage of the amplifier to make the first node into a virtual ground. The amplifying unit is connected between the first node and the output stage of the amplifier, and charges the charge charged in the charging unit in response to a second signal.
Abstract translation: 提供开关电容器电路及其放大方法，通过在反相放大器的输入级中安装电容器来消除偏移电压对输出级的影响。 开关电容器电路（20）包括放大器，充电单元，偏移单元和放大单元。 充电单元连接在输入节点和第一节点之间，并响应于第一信号对与输入电压相对应的电荷充电。 偏移单元连接在放大器的第一节点和输入级之间，并且保持与放大器的输入级和输出级之间的偏移电压对应的电荷，以使第一节点成为虚拟接地。 放大单元连接在放大器的第一节点和输出级之间，并响应于第二信号对充电单元中充电的充电进行充电。
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Patent Agency Ranking
公开(公告)号：KR1020010025867A
公开(公告)日：2001-04-06
申请号：KR1019990036917
申请日：1999-09-01
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H01L27/06
Abstract: PURPOSE: A method for fabricating a semiconductor device is provided to reduce crosstalk between parallel signal lines connecting integrated circuits. CONSTITUTION: A device isolation layer(102) is formed on a semiconductor substrate(100) to define an active region and an inactive region. Next, a gate oxide layer(103), a conductive layer(104) and a polysilicon layer(105) are formed and etched to form a gate electrode(106). The polysilicon layer(105) remains in the inactive region. Next, after a gate spacer(107) is formed, an oxide layer(108) is formed on a resultant entire surface and then patterned to form contact holes therein. Then, contact plugs(112) are formed in the respective contact holes, and a metal layer is formed on a resultant entire surface. Subsequently, signal transmission lines(116a-116e) are formed by an etching of the metal layer. Two lines(116a,116e) among the signal transmission lines are connected to a ground voltage. In particular, capacitance between the remaining lines(116b-116d) and the polysilicon layer(105) can be controlled by varying a thickness of the oxide layer(108), reducing crosstalk between the parallel signal lines.
Abstract translation: 目的：提供一种制造半导体器件的方法，以减少连接集成电路的并行信号线之间的串扰。 构成：在半导体衬底（100）上形成器件隔离层（102）以限定有源区和非活性区。 接着，形成蚀刻栅极氧化物层（103），导电层（104）和多晶硅层（105），形成栅电极（106）。 多晶硅层（105）保留在非活性区域。 接下来，在形成栅极间隔物（107）之后，在所得到的整个表面上形成氧化物层（108），然后构图以在其中形成接触孔。 然后，在各个接触孔中形成接触塞（112），并且在所得到的整个表面上形成金属层。 随后，通过蚀刻金属层形成信号传输线（116a-116e）。 信号传输线中的两条线（116a，116e）连接到接地电压。 特别地，可以通过改变氧化物层（108）的厚度来控制剩余的线（116b-116d）和多晶硅层（105）之间的电容，从而减少并行信号线之间的串扰。
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公开(公告)号：KR1020000060455A
公开(公告)日：2000-10-16
申请号：KR1019990008769
申请日：1999-03-16
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H01L27/108
Abstract: PURPOSE: A semiconductor device is provided to prevent an electromagnetic interference(EMI) caused by power and ground lines bended in the corner, by having a capacitor in the corner of the device. CONSTITUTION: A semiconductor device(201) having a capacitor in the corner comprises a power line(211), a ground line(221) and a plurality of capacitor(231). The power line is disposed along sides of the semiconductor device and delivers a power voltage of the semiconductor device. The ground line is disposed along sides of the semiconductor device and delivers a ground voltage of the semiconductor device. The plurality of capacitors is disposed in the corner of the semiconductor device and connects the power lines with the ground lines, respectively.
Abstract translation: 目的：提供一种半导体器件，通过在器件的拐角处设置电容器来防止电源和接地线在拐角处产生电磁干扰（EMI）。 构成：在拐角处具有电容器的半导体装置（201）包括电力线（211），接地线（221）和多个电容器（231）。 电源线沿着半导体器件的侧面设置并传送半导体器件的电源电压。 接地线沿着半导体器件的侧面设置并传送半导体器件的接地电压。 多个电容器设置在半导体器件的角部，分别将电源线与接地线连接起来。
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公开(公告)号：KR100228276B1
公开(公告)日：1999-11-01
申请号：KR1019960024422
申请日：1996-06-27
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H01L27/04
Abstract: 본 발명은 반도체 장치의 보호 소자에 관한 것으로서, 더욱 상세하게는, 정전기 스트레스로부터 반도체 장치를 보호하는 보호 소자에 관한 것이다. 보호 소자로 사용되는 수직형 npn 쌍극성 트랜지스터의 베이스 영역과 컬렉터 싱크 영역을 접하게 한다. 이때 베이스 영역을 고농도로 형성함으로써 베이스 핀치 저항을 줄인다. 이와같이 하면 보호 소자의 턴온 전압을 낮추고 효율적인 방전을 통하여 정전기 수준을 향상시킬 수 있다.
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公开(公告)号：KR1019990074739A
公开(公告)日：1999-10-05
申请号：KR1019980008533
申请日：1998-03-13
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H01L27/08
Abstract: 본 발명은 반도체 소자의 입/출력 구조를 공개한다. 그 구조는 실리사이드 폴리로 형성된 접지전압 층, 상기 접지전압 층위에 전원간 기생 캐패시턴스를 형성하기 위하여 형성된 옥사이드, 및 상기 옥사이드위에 메탈로 형성된 전원전압 층을 반도체 소자의 입/출력 근처에 구비하여 이루어져 있다. 따라서, 반도체 소자의 입/출력 근처에 전원전압 층과 접지전압 층을 형성하고 이들 사이에 기생 캐패시턴스를 형성함으로써 순시 전류 루프를 감소하여 EMI를 줄일 수 있다.
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公开(公告)号：KR100194684B1
公开(公告)日：1999-07-01
申请号：KR1019960024425
申请日：1996-06-27
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H01L29/72
Abstract: 본 발명은 반도체 장치의 보호 소자에 관한 것으로서, 더욱 상세하게는, 정전기 따위의 과전압으로부터 반도체 장치를 보호하는 보호소자에 관한 것이다. 보호 소자로 사용되는 수직형 npn 쌍극성 트랜지스터의 베이스 영역을 농도가 낮은 진성 베이스 영역과 농도가 높은 외성 베이스 영역으로 나누고 외성 베이스 영역을 컬렉터 싱크 영역과 중첩되도록 한다. 또한 베이스 영역과 이미터 영역을 공통으로하여 접지시키고 중첩되어 있지 않은 컬렉터 싱크 영역에 패드를 연결한다. 이와 같이 하면 보호 소자의 턴온 전압을 낮출 수 있을 뿐 아니라 방전 효율을 증가시킬 수 있다.
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