公开(公告)号：EP2399863A1

公开(公告)日：2011-12-28

申请号：EP10166782.2

申请日：2010-06-22

Applicant: VALTION TEKNILLINEN TUTKIMUSKESKUS

Inventor： Puurunen, Riikka ,  Henttinen, Kimmo ,  Kattelus, Hannu ,  Suni, Tommi

IPC: B81C1/00

CPC classification number: H01L21/0228 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81C1/00801 ,  B81C2201/014 ,  B81C2201/0167 ,  B81C2201/053 ,  B81C2203/0118 ,  H01L29/02

Abstract: A method for manufacturing a multi-layer substrate structure comprising obtaining a first and second wafer, such as two silicon wafers, wherein at least one of the wafers may be optionally provided with a material layer such as an oxide layer (302, 404), forming a cavity on the bond side of the first wafer (306, 406), depositing, preferably by ALD (Atomic Layer Deposition), a material layer, such as alumina layer, on either wafer arranged so as to at least in places face the other wafer and cover at least portion of the cavity of the first wafer, such as bottom, wall and/or edge thereof, and enable stopping etching, such as plasma etching, into the underlying material (308, 408), and bonding the wafers provided with at least the aforesaid ALD layer as an intermediate layer together to form the multi-layer semiconductor substrate structure (310, 312). A related multi-layer substrate structure is presented.

Abstract translation: 一种用于制造多层衬底结构的方法，包括获得第一和第二晶片，例如两个硅晶片，其中至少一个晶片可以可选地设置有诸如氧化物层（302,404）的材料层， 在第一晶片（306,406）的接合侧上形成空腔，优选地通过ALD（原子层沉积）沉积材料层，例如氧化铝层，在任一晶片上布置，至少在面向 其他晶片并且覆盖第一晶片的空腔的至少部分，例如其底部，壁和/或边缘，并且使得能够停止诸如等离子体蚀刻的蚀刻到下面的材料（308,408）中，并且将晶片 至少设置上述ALD层作为中间层，以形成多层半导体衬底结构（310,312）。 提出了相关的多层基板结构。

公开(公告)号：EP1976428A1

公开(公告)日：2008-10-08

申请号：EP06840258.5

申请日：2006-12-14

Applicant: MEDTRONIC, INC.

Inventor： SCHUGT, Michael A. ,  MOTHILAL, Kamal Deep ,  LARSON, Lary R. ,  MATTES, Michael F. ,  RUBEN, David A.

IPC: A61B5/0215 ,  A61N1/05

CPC classification number: A61N1/056 ,  A61B5/0215 ,  B81B3/0072 ,  B81C2201/0167 ,  H01L21/4857 ,  H05K1/0271 ,  H05K3/4061 ,  H05K3/4092

Abstract: Media-exposed interconnects for transducer modules are disclosed. The transducers may be sensing transducers, actuating transducers, IC-only transducers, or combinations thereof, or other suitable transducers. The transducers may be used in connection with implantable medical devices and may be exposed to various media, such as body fluids. The media-exposed interconnects for transducer modules may allow transducers to communicate electrically with other components, such as implantable medical devices.

公开(公告)号：EP1493712B1

公开(公告)日：2008-08-27

申请号：EP04102666.7

申请日：2004-06-11

Applicant: Dalsa Semiconductor Inc.

Inventor： Ouellet, Luc ,  Antaki, Robert

IPC: B81B3/00

CPC classification number: B81C1/00666 ,  B81B2207/015 ,  B81C2201/0167

公开(公告)号：EP1941316A2

公开(公告)日：2008-07-09

申请号：EP06836379.5

申请日：2006-10-19

Applicant: IDC, LLC

Inventor： WANG, Hsin-Fu ,  TUNG, Ming-Hau ,  ZEE, Stephen

IPC: G02B26/00 ,  B81B3/00 ,  H01L23/06

CPC classification number: G02B26/001 ,  B81B3/0072 ,  B81B2201/047 ,  B81C1/00793 ,  B81C2201/0167

Abstract: Described herein is the use of a diffusion barrier layer between metallic layers in MEMS devices. The diffusion barrier layer prevents mixing of the two metals, which can alter desired physical characteristics and complicate processing. In one example, the diffusion barrier layer may be used as part of a movable reflective structure in interferometric modulators.

公开(公告)号：EP1461286B1

公开(公告)日：2007-08-08

申请号：EP02716555.4

申请日：2002-05-02

Applicant: Silverbrook Research Pty. Limited

Inventor： SILVERBROOK, Kia Silverbrook Research Pty Ltd

IPC: B81B3/00 ,  B81C1/00 ,  C30B29/68 ,  H01L21/20 ,  C30B23/02 ,  C23C14/06 ,  C23C14/02

CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  B81C2201/017 ,  C23C14/024 ,  C23C14/0641 ,  C30B23/02 ,  C30B29/38 ,  C30B29/605

Abstract: A crystalline thin film structure formed by the deposition of a predominant first crystalline material in two or more layers interleaved by layers of a second crystalline material having a lattice constant that differs from the lattice constant of the predominant first crystalline material in order to disrupt the growth of columnar crystals in the predominant first crystalline material in order to reduce the differential stress profile through the thickness of the film structure relative to the differential stress profile of a crystalline thin film structure formed solely from the predominant first crystalline material.

公开(公告)号：EP1601821A4

公开(公告)日：2007-03-14

申请号：EP04718225

申请日：2004-03-08

Applicant: MICRO RELAY HOLDINGS PTY LTD

Inventor： SEXTON BRETT ,  DAVIS THIMOTHY J

IPC: B81B3/00 ,  B81C1/00 ,  C25D5/12 ,  H05K3/40

CPC classification number: B81C1/00666 ,  B81B2201/018 ,  B81B2203/0118 ,  B81C2201/0167 ,  C25D5/12 ,  H01H2059/0081 ,  H05K3/4092 ,  H05K2201/0311 ,  H05K2201/0338 ,  H05K2201/0397 ,  H05K2203/0726

Abstract: Curved out of plane metal components are formed on PCB substrates (11) by electroplating two layers (13, 14) of the same metal such that each layer has a different internal stress. This produces as curvature of the layer (13, 14) which enables coils, curved cantilever beams and springs to be fabricated. The amplitude and direction of curvature can be controlled by controlling the stress and thickness of each layer. The stress is controlled by controlling the composition of the electroplating bath.

公开(公告)号：EP1461286A4

公开(公告)日：2006-01-04

申请号：EP02716555

申请日：2002-05-02

Applicant: SILVERBROOK RES PTY LTD

Inventor： SILVERBROOK KIA

IPC: B81B3/00 ,  B81C1/00 ,  C23C14/02 ,  C23C14/06 ,  C30B23/02 ,  C30B29/60 ,  C30B29/68 ,  H01L21/20

CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  B81C2201/017 ,  C23C14/024 ,  C23C14/0641 ,  C30B23/02 ,  C30B29/38 ,  C30B29/605

Abstract: A crystalline thin film structure formed by the deposition of a predominant first crystalline material in two or more layers interleaved by layers of a second crystalline material having a lattice constant that differs from the lattice constant of the predominant first crystalline material in order to disrupt the growth of columnar crystals in the predominant first crystalline material in order to reduce the differential stress profile through the thickness of the film structure relative to the differential stress profile of a crystalline thin film structure formed solely from the predominant first crystalline material.

公开(公告)号：EP1601821A1

公开(公告)日：2005-12-07

申请号：EP04718225.8

申请日：2004-03-08

Applicant: Micro Relay Holdings Pty Ltd

Inventor： SEXTON, Brett,CSIRO ,  DAVIS, Thimothy J.,CSIRO

IPC: C25D5/12

CPC classification number: B81C1/00666 ,  B81B2201/018 ,  B81B2203/0118 ,  B81C2201/0167 ,  C25D5/12 ,  H01H2059/0081 ,  H05K3/4092 ,  H05K2201/0311 ,  H05K2201/0338 ,  H05K2201/0397 ,  H05K2203/0726

Abstract: Curved out of plane metal components are formed on PCB substrates (11) by electroplating two layers (13, 14) of the same metal such that each layer has a different internal stress. This produces as curvature of the layer (13, 14) which enables coils, curved cantilever beams and springs to be fabricated. The amplitude and direction of curvature can be controlled by controlling the stress and thickness of each layer. The stress is controlled by controlling the composition of the electroplating bath.

公开(公告)号：EP1396470A3

公开(公告)日：2004-11-17

申请号：EP03101402.0

申请日：2003-05-19

Applicant: Dalsa Semiconductor Inc.

Inventor： Ouellet, Luc ,  Antaki, Robert ,  Tremblay, Yves

IPC: B81B7/00 ,  B81B3/00

CPC classification number: B81C1/00325 ,  B22F1/0051 ,  B81C2201/0167 ,  C23C14/0021 ,  C23C14/0641 ,  C23C14/228 ,  C23C14/325 ,  G01C19/5719 ,  G01P15/0802

Abstract: A cavity forming formed in an encapsulation structure under a vacuum in a vacuum chamber is sealed with a capping layer. A stiff protective layer under tensile stress is deposited on the capping layer prior to venting the vacuum chamber to atmospheric pressure. The capping layer is preferably aluminum or an aluminum alloy, and the protective layer is preferably δ-TiN having a suitable high Young's modulus.

公开(公告)号：EP1452481A2

公开(公告)日：2004-09-01

申请号：EP04100440.9

申请日：2004-02-05

Applicant: Dalsa Semiconductor Inc.

Inventor： Ouelett, Luc ,  Antaki, Robert

IPC: B81B7/00 ,  B81C5/00 ,  B81B3/00

CPC classification number: B81C1/00246 ,  B81C1/00666 ,  B81C2201/0164 ,  B81C2201/0167 ,  B81C2201/0169 ,  B81C2203/0735

Abstract: A micro-electro-mechanical (MEM) device and an electronic device are fabricated on a common substrate by fabricating the electronic device comprising a plurality of electronic components on the common substrate, depositing a thermally stable interconnect layer on the electronic device, encapsulating the interconnected electronic device with a protective layer, forming a sacrificial layer over the protective layer, opening holes in the sacrificial layer and the protective layer to allow the connection of the MEM device to the electronic device, fabricating the MEM device by depositing and patterning at least one layer of amorphous silicon, and removing at least a portion of the sacrificial layer. In this way, the MEM device can be fabricated after the electronic device on the same substrate.

Abstract translation: 通过在公共衬底上制造包括多个电子部件的电子器件，在公共衬底上制造微电子机械（MEM）器件和电子器件，在电子器件上沉积热稳定的互连层，封装互连的 具有保护层的电子器件，在保护层上形成牺牲层，在牺牲层和保护层中的开孔，以允许MEM器件连接到电子器件，通过沉积和图案化制造MEM器件至少一个 非晶硅层，并且去除牺牲层的至少一部分。 以这种方式，可以在同一基板上的电子器件之后制造MEM器件。