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公开(公告)号：JP2003091414A
公开(公告)日：2003-03-28
申请号：JP2002211023
申请日：2002-07-19
Applicant: ST MICROELECTRONICS INC
Inventor： RICHARDSON NICHOLAS J
Abstract: PROBLEM TO BE SOLVED: To provide a progressive instruction folding technology for improving instruction processing capabilities in a pipe line type processor. SOLUTION: A plurality of fold decoders are respectively connected to the different sets of consecutive entries in an instruction fetch buffer stack, and the contents of the consecutive entries are checked with respect to the variable number of variable length instructions which may be folded. Then, folding information corresponding to each of those sets of entries for identifying the number of instructions (when they are present) and the dimensions of those instructions is generated by the fold decoders, and stored in the first entry of the set, and transmitted to a main decoder so as to be used at the time of folding the instructions in a decoding period.
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公开(公告)号：JP2003087058A
公开(公告)日：2003-03-20
申请号：JP2002232764
申请日：2002-08-09
Applicant: ST MICROELECTRONICS INC
Inventor： MARIANI GIORGIO
Abstract: PROBLEM TO BE SOLVED: To provide a voltage-control-type resistor which possesses high resistance-to-voltage linearity for use in a turning circuit, etc. SOLUTION: Many voltage-controlled-type resistance cells are used to form a voltage-controlled-type resistance (value) constituting a body, and each cell is made of a transistor which possesses a capacitor for bias connected between a gate and a source, and a relevant controller which is coupled with that capacitor so as to keep stable charge on that capacitor for bias and keep the gate- source voltage at control voltage, corresponding to the desired resistance (value). The gate voltage applied to each transistor can float together with the source voltage, so as to keep the gate-source voltage constant, and besides that resistance constituting body provides the improve linearity of resistance (value) dependent upon the voltage together with bias action in a larger range while lowering the refresh frequency required for avoiding the penetration of noise.
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公开(公告)号：JP2002329825A
公开(公告)日：2002-11-15
申请号：JP2002111961
申请日：2002-04-15
Applicant: ST MICROELECTRONICS INC
Inventor： ANTHONY M CHU
Abstract: PROBLEM TO BE SOLVED: To provide an improved preformed adhesive layer used in an integrated circuit package. SOLUTION: This preformed adhesive layer used for uniting components in the integrated circuit package has ventilation slots for controlling the dimensions and positions of voids in the integrated circuit package after the package is assembled. The air randomly trapped between the adhesive layer and the surfaces of the components during the assembling period of the package is liberated to the ventilation slots during the succeeding assembling period or the period of mounting work performed at a raised temperature. Consequently, the air does not generate such an internal pressure that separates the package components from each other nor is liberated into a sealant. Therefore, the occurrence of the problem of die peeling and sealant voids caused by the air trapped during a reflow period or other assembling and mounting periods is avoided.
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公开(公告)号：JP2002304820A
公开(公告)日：2002-10-18
申请号：JP2002037007
申请日：2002-02-14
Applicant: ST MICROELECTRONICS INC
Inventor： OZDEMIR HAKAN , BYRNE JASON D , HEYDARI FEREIDOON
Abstract: PROBLEM TO BE SOLVED: To provide an enhanced Viterbi detector that recovers a binary sequence from a read signal read by a disk drive system or the like. SOLUTION: This invention provides the Viterbi detector receiving a signal that represents a binary sequence having groups of no more and no fewer than a predetermined number of consecutive bits each having a first logic level, where the groups are separated from each other by respective bits having a second logic level. The Viterbi detector recovers the binary sequence from the signal by calculating a respective path metric for each of no more than four possible states of the binary sequence, and determining a surviving path from the calculated path metrics, where the binary sequence lies along the surviving path. Or the Viterbi decoder recovers the binary sequence from the signal by calculating respective path metrics for possible states of the binary sequence, calculating multiple path metrics for no more than one of the possible states, and determining the surviving path from the calculated path metrics.
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公开(公告)号：JP2002267408A
公开(公告)日：2002-09-18
申请号：JP2001396321
申请日：2001-12-27
Applicant: ST MICROELECTRONICS INC
Inventor： KRAMER ALAN
Abstract: PROBLEM TO BE SOLVED: To provide a circuit and a method for improved fingerprint pattern detection. SOLUTION: A human body operates as an input capacitor to perform variable charge transfer to an input capacitor and a function as a variable detection capacitor value for a capacity sensor is implemented. This fingerprint sensor is therefore always very sensitive and can detect a human fingerprint even when a protection layer made of, for example, plastic, wax paper, etc., covers the sensor. Further, the fingerprint pattern can be detected even when the human wears thick gloves such as globes of latex.
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Patent Agency Ranking
公开(公告)号：JP2002204158A
公开(公告)日：2002-07-19
申请号：JP2001359716
申请日：2001-11-26
Applicant: ST MICROELECTRONICS INC
Inventor： HERNDEN CHARLES , PASOLINI FABIO
Abstract: PROBLEM TO BE SOLVED: To provide a device for generating synchronous numeric signals, and to provide its method. SOLUTION: The device includes a reference generating devices (4, 21) supplying a reference signal (SCONTR) and a first timing signal (T1), both having a reference frequency (F1); and a timed (that is, synchronized) generating devices (30, 31, 35) supplying a synchronized signal (SACC) having the reference frequency (F1). The device further includes a synchronization stage generating a second timing signal (T2) having a first controlled frequency (F2) correlated to the reference frequency (F1), and phase synchronization pulses (TDEC) having a preset delay (K) programmable with respect to the first timing signal (T1) and the first frequency (F1).
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公开(公告)号：JP2002136170A
公开(公告)日：2002-05-10
申请号：JP2001262752
申请日：2001-08-31
Applicant: ST MICROELECTRONICS INC
Inventor： MENEGOLI PAOLO , ENDEL TSUNKU EROGURU , WITNEY FUI RI
Abstract: PROBLEM TO BE SOLVED: To provide improved method and system for the control of a multi- phase motor with a plurality of windings. SOLUTION: This system has a memory device in which data expressing a prescribed drive profile are stored and a driver circuit, which drives windings of a multiphase motor according to the data supplied by the memory device. A feedback control loop, which has input terminals connected to the selected windings of the multiphase motor and supplies an address signal to the memory device according to the current level of the winding selected at an approximate timing, when a corresponding counter electromotive force (bemf) cross zero reference. The feedback control loop controls the current supplied to the selected winding by the driver circuit, so as to make the phases of the currents supplied to the respective windings substantially equal to the phase of the counter electromotive force signal, corresponding to the selected winding.
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公开(公告)号：JP2002132513A
公开(公告)日：2002-05-10
申请号：JP2001212263
申请日：2001-07-12
Applicant: ST MICROELECTRONICS INC , RAVISENT IP INC
Inventor： SIGMUND ULRICH
Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus to generate a processor instruction sequence for a routine of image processing using an improving instruction of multimedia. SOLUTION: In the method and apparatus, by using an abstract routine generator and a translation machine, an instruction improving data of multimedia is processed. The generator generates an abstract routine to acquire and to compile the data. Output of the generator is an abstract expression of the data. Then, the machine receives the expression to generate codes for the image processing.
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公开(公告)号：JP2002123903A
公开(公告)日：2002-04-26
申请号：JP2001261663
申请日：2001-08-30
Applicant: ST MICROELECTRONICS INC
Inventor： ALINI ROBERTO , LAM QUOCDZUNG T , CHEW XIAOKUN LIU , MACCORNACK MARK , BEZINQUE DAVID JOSEPH , LEE TEHRI , LE SU DANG , AXEL ALLEGRET DE LA SJORLES , DENOYER GILLES
Abstract: PROBLEM TO BE SOLVED: To provide an improved method for controlling a writing head of a magnetic disk recorder. SOLUTION: In this method, the current is sunk from a 1st terminal of the writing head and also the current is substantially and simultaneously supplied to a 2nd terminal of the writing head, and consequently the voltage level of 1st normal state is presented on the 1st terminal of the writing head and the voltage level of 2nd normal state is presented on the 2nd terminal of the writing head, and these levels show the nearly middle points between the high reference voltage level and low reference voltage level. The common mode voltage of the writing head is substantially constant as to the time, accordingly.
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公开(公告)号：JP2002123339A
公开(公告)日：2002-04-26
申请号：JP2001227734
申请日：2001-07-27
Applicant: ST MICROELECTRONICS INC
Inventor： MCCLURE DAVID C , YOUSSEF TOM
Abstract: PROBLEM TO BE SOLVED: To provide a technology for switching from a primary power source to a secondary power source without loosing data stored from a volatile element. SOLUTION: This integrated circuit has a forcible power source switching circuit which detects the supply level of the primary power source dropping below a predetermined threshold level. The switching circuit on the integrated circuit starts switching operation once the forcible power source switching circuit detects the supply level received from the primary power source dropping the predetermined threshold level. The detection by the forcible power source switching circuit can be generated at a signal level having faster transition than a specific negative variation rate. This integrated circuit can be built in an arbitrary system equipped with a memory or a volatile element such as a clock.
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