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1.
公开(公告)号:JP2003234426A
公开(公告)日:2003-08-22
申请号:JP2003023489
申请日:2003-01-31
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU , HARRY MICHAEL SIEGEL
IPC: H01L23/12 , H01L21/48 , H01L21/98 , H01L23/538 , H01L25/065 , H05K3/46
Abstract: PROBLEM TO BE SOLVED: To provide a system and a method of mechanically planarizing a sequential buildup board for integrated circuit packages. SOLUTION: A planarizing plate is settled in contact with a ununiform outer surface of a dielectric layer covering underlying functional circuit elements and filler circuit elements. A heating element on the planarizing plate planarizes protrusive portions of the outer surface of the dielectric layer to form a flat outer surface on the dielectric layer. After cooling the flat outer surface of the dielectric layer, it is covered with a metal conductor layer. This method increases the number of sequential buildup layers capable of being laid on a sequential buildup board. COPYRIGHT: (C)2003,JPO
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2.
公开(公告)号:JP2003234372A
公开(公告)日:2003-08-22
申请号:JP2003023178
申请日:2003-01-31
Applicant: ST MICROELECTRONICS INC
Inventor: HARRY MICHAEL SIEGEL , ANTHONY M CHU
IPC: H01L21/60 , H01L21/52 , H01L21/58 , H01L23/544
Abstract: PROBLEM TO BE SOLVED: To provide an improved system and a method in which an integrated circuit die is matched with an integrated circuit board. SOLUTION: The integrated circuit die is made to match with the integrated circuit board for disposing an adherent made of a plurality of deformable substances on the board of a position to match the die. A marking unit is indexed with respect to a first positioning hole and a second positioning hole in the board. An adherent made of the deformable substances with a tolerance of less than 100 microns with respect to the first and second positioning holes is marked by the marking unit. The marked part of the adherent is formed with a pocket for receiving the integrated circuit die. This enables the precise matching of the die on the board in three dimensions. COPYRIGHT: (C)2003,JPO
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公开(公告)号:JP2002329825A
公开(公告)日:2002-11-15
申请号:JP2002111961
申请日:2002-04-15
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU
Abstract: PROBLEM TO BE SOLVED: To provide an improved preformed adhesive layer used in an integrated circuit package. SOLUTION: This preformed adhesive layer used for uniting components in the integrated circuit package has ventilation slots for controlling the dimensions and positions of voids in the integrated circuit package after the package is assembled. The air randomly trapped between the adhesive layer and the surfaces of the components during the assembling period of the package is liberated to the ventilation slots during the succeeding assembling period or the period of mounting work performed at a raised temperature. Consequently, the air does not generate such an internal pressure that separates the package components from each other nor is liberated into a sealant. Therefore, the occurrence of the problem of die peeling and sealant voids caused by the air trapped during a reflow period or other assembling and mounting periods is avoided.
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公开(公告)号:JP2000036517A
公开(公告)日:2000-02-02
申请号:JP16253399
申请日:1999-06-09
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU
Abstract: PROBLEM TO BE SOLVED: To provide a technique for strengthening a connecting force between a flip chip IC and a substrate. SOLUTION: At least either an IC or a substrate is provided with an anchor (fixed) point 702 so that a connecting force between the IC and the substrate can be improved. The anchor (fixed) point 702 can be a through-hole passing through the IC or the substrate, or a groove, or a surface recessed part such as a notched part. The anchor (fixed) point 702 can be packed with a lower side packing substrate during under-fill, that is, a lower side packing processing period (302) This anchor (fixed) point 702 can apply additional mechanical strength to a bonding force, that is, the connecting force between the IC and the substrate.
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公开(公告)号:JP2003203380A
公开(公告)日:2003-07-18
申请号:JP2002366524
申请日:2002-12-18
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU , THOMAS DANIELLE A
Abstract: PROBLEM TO BE SOLVED: To provide an improved electro-optic device that communicates with an optical disk and a method for manufacturing the electro-optic device. SOLUTION: Light from a laser diode is directed by mirrors on angled surfaces of an optical unit through a first lens at an optical disc. The light returns from the disc on a parallel path through a second lens and is directed at a photodetector. A semiconductor device controls the operation of the laser diode and receives signals from the photodetector for processing. The optical unit is formed from one or two glass elements cut from a larger glass wafer or wafers using photolithographic techniques. The mirrors are formed by thin films deposited on angled glass surfaces formed by selective plasma etching of the wafers. At least one mirror is partially reflective and is formed by depositing a thin film of titanium nitride. COPYRIGHT: (C)2003,JPO
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公开(公告)号:JP2000040742A
公开(公告)日:2000-02-08
申请号:JP17604899
申请日:1999-06-22
Applicant: ST MICROELECTRONICS INC
Inventor: CHAN TSIU CHIU , ANTHONY M CHU , SMITH GREGORY C
IPC: C23C18/31 , C25D3/46 , C25D7/12 , H01L21/288 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/532
Abstract: PROBLEM TO BE SOLVED: To use the low specific resistance mutual metal connecting body in an integrated circuit by forming the deep groove in an insulating layer along a contact region by etching, exposing a part of the contact region, and filling the upper groove, wherein the mutual connecting body is specified and formed, with silver and the like by plating. SOLUTION: An insulating layer 112 is formed on insulating layers 104 and 106 and conductive plug 110 along a substrate 102. Then, the insulating layer 112 is formed in the pattern and is selectively etched. Thus, a groove 114 is formed. In the groove 114, a part of the conductive plug 110 is exposed and extended on the insulating layers 104 and 106 to the other conductive plug, in contact with the different device or the input-output pads. The path of the mutual connecting body formed in the groove 114 is specified. Then, the upper part of the insulating layer 112 and the inside of the groove 114 are plated. A silver layer 116 is formed, and the groove 114 is filled. Thereafter, the part of the silver layer 116 at the upper side than the insulating layer 112 is removed through CMP, and the mutual connecting body is formed.
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7.
公开(公告)号:JP2002134678A
公开(公告)日:2002-05-10
申请号:JP2001271813
申请日:2001-09-07
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU
Abstract: PROBLEM TO BE SOLVED: To provide electrostatic discharge protection technology improving a packaged integrated circuit. SOLUTION: In the packaged integrated circuit, electrostatic discharge protection is given by a part of a lead frame mounting a finger printing sensor integrated circuit die 104. A part of the lead frame is folded around the side part of the sealed integrated circuit 104 and on the surface on the periphery or adjacent to the sealed integrated circuit die 104 to form electrostatic discharge rings 108a, 108b, 108c. The electrostatic discharge rings 108a, 108b, 108c are connected to ground, and when a finger comes in contact with the electrostatic discharge rings 108a, 108b, 108c, electrostatic charge supplied from the finger is dissipated to the ground.
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公开(公告)号:JP2000193410A
公开(公告)日:2000-07-14
申请号:JP35688899
申请日:1999-12-16
Applicant: ST MICROELECTRONICS INC
Inventor: ANTHONY M CHU
Abstract: PROBLEM TO BE SOLVED: To maintain capacity resisting mechanical stress and protect a sensor from a static discharge by placing an insulation layer between a plurality of conductive plates and on them. SOLUTION: A user input device being provided with an array 2 that is adjacent to a discharge grid 32 enclosing each cell 3 and consists of a pixel 3 is formed. The discharge grid 32 is not needed to completely enclose each cell 3, and can be directly placed above the cell 3 without placing so that the grid 32 is made adjacent to each cell 3 of the array 2. However, in some cases, the static discharge grid 32 is desirably formed for manufacturing easiness. Also, sensitivity can be increased by placing not the information of the cell 3 but a grid line adjacent to the cell 3.
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