Fixed voltage generating circuit
    181.
    发明授权
    Fixed voltage generating circuit 有权
    固定电压发生电路

    公开(公告)号:US09088252B2

    公开(公告)日:2015-07-21

    申请号:US14197220

    申请日:2014-03-05

    CPC classification number: H03F3/45085

    Abstract: A fixed voltage generating circuit includes a current mirror, a differential pair, and a resistor coupled to the current mirror. A node of the resistor is coupled to a voltage source. The differential pair includes two resistors coupled to the voltage source to enable the differential pair outputting a stable output voltage.

    Abstract translation: 固定电压产生电路包括电流镜,差分对和耦合到电流镜的电阻。 电阻器的节点耦合到电压源。 差分对包括耦合到电压源的两个电阻器,以使差分对输出稳定的输出电压。

    FIXED VOLTAGE GENERATING CIRCUIT
    182.
    发明申请
    FIXED VOLTAGE GENERATING CIRCUIT 审中-公开
    固定电压发生电路

    公开(公告)号:US20140253087A1

    公开(公告)日:2014-09-11

    申请号:US13865205

    申请日:2013-04-18

    Inventor: Chih-Sheng Chen

    Abstract: A fixed voltage generating circuit includes a current mirror, a differential pair, and a resistor coupled to the current mirror. A node of the resistor is coupled to a voltage source. The differential pair includes two resistors coupled to the voltage source for enabling the differential pair to output a fixed voltage.

    Abstract translation: 固定电压产生电路包括电流镜,差分对和耦合到电流镜的电阻。 电阻器的节点耦合到电压源。 差分对包括耦合到电压源的两个电阻器,用于使差分对能够输出固定电压。

    ELECTRONIC DEVICE AND ANTENNA MODULE THEREOF
    183.
    发明申请
    ELECTRONIC DEVICE AND ANTENNA MODULE THEREOF 有权
    电子装置及其天线模块

    公开(公告)号:US20130147669A1

    公开(公告)日:2013-06-13

    申请号:US13675369

    申请日:2012-11-13

    Inventor: Shau-Gang MAO

    CPC classification number: H01Q1/24 H01Q1/243 H01Q1/526 H01Q9/0414 H01Q9/42

    Abstract: An antenna module in provided. The antenna module includes a metal housing, a radiator and a feed conductor. The metal housing includes a housing surface and a through hole. The radiator surrounds the metal housing. The feed conductor connects the radiator to an inner circuit inside the metal housing via the through hole.

    Abstract translation: 提供的天线模块。 天线模块包括金属外壳,散热器和馈电导体。 金属壳体包括壳体表面和通孔。 散热器围绕金属外壳。 馈电导体通过通孔将散热器连接到金属外壳内部的内部电路。

    RADAR DETECTOR AND INTERFERENCE SUPPRESSION METHOD USING RADAR DETECTOR

    公开(公告)号:EP4083653A1

    公开(公告)日:2022-11-02

    申请号:EP21213292.2

    申请日:2021-12-09

    Inventor: Chi, Hsiang-Feng

    Abstract: A radar detector (800) includes a radar transmitting device (110), a radar receiving device (120), an analog-to-digital converter (ADC) (130), and a digital processing unit (140). The radar transmitting device (110) transmits a first wireless signal. The radar receiving device (120) receives a second wireless signal to generate an analog reference signal (ASr) in response to the first wireless signal subdued from being transmitted, and receives a third wireless signal to generate an analog main signal (ASp) in response to the first wireless signal not subdued from being transmitted. The ADC (130) generates a digital reference signal (Sr) according to the analog reference signal (ASr), and generates a digital main signal (Sp) according to the analog main signal (ASp). The digital processing unit (140) adjusts the digital or analog main signal (Sp, ASp) according to the digital reference signal (Sr).

    TEMPERATURE DETECTOR
    185.
    发明公开

    公开(公告)号:EP4063814A1

    公开(公告)日:2022-09-28

    申请号:EP21216744.9

    申请日:2021-12-22

    Abstract: A temperature detector (1) is used to detect a temperature of a circuit under test, and includes a temperature coefficient component (10), a multiplier (12), an impedance component (Zl) and a node (N1). The temperature coefficient component (10) is arranged in proximity to the circuit under test. A control terminal of the multiplier (12) is coupled to the temperature coefficient component (10). The impedance component (Zl) is coupled between the second terminal of the temperature coefficient component (10) and the control terminal of the multiplier (12), or between a second terminal of the multiplier (12) and a third voltage terminal. The node (N1) is formed between the temperature coefficient component (10) and the multiplier (12). An amplified detection current (Ia) flowing to a first terminal of the multiplier (12) is positively correlated to the temperature of the circuit under test.

    FREQUENCY DETECTOR
    186.
    发明公开
    FREQUENCY DETECTOR 审中-公开

    公开(公告)号:EP3796561A1

    公开(公告)日:2021-03-24

    申请号:EP20193565.7

    申请日:2020-08-31

    Abstract: The frequency detector (100) includes a first impedance circuit (110) and a second impedance circuit (120). The first impedance circuit (110) has a first terminal for receiving an input signal (SIG IN ), and a second terminal for outputting a divisional signal (SIG DVS ). The second impedance circuit (120) has a first terminal coupled to the second terminal of the first impedance circuit (110), and a second terminal coupled to a first system voltage terminal (NV1). The frequency response of the first impedance circuit (110) is different from a frequency response of the second impedance circuit (120). The resistance of the first impedance circuit (110), a resistance of the second impedance circuit (120), and the divisional signal (SIG DVS ) change with a frequency of the input signal (SIG IN ).

    POWER DETECTOR WITH ALL TRANSISTORS BEING BIPOLAR JUNCTION TRANSISTORS

    公开(公告)号:EP3709510A3

    公开(公告)日:2020-11-04

    申请号:EP19217298.9

    申请日:2019-12-18

    Abstract: A power detector (10, 10B) has a signal input terminal (Pin), N limiting amplifiers (30A, 30B, 30C, 30D), N rectifiers (40A, 40B, 40C, 40D) and a signal output end. N is an integer greater than 1. The signal input terminal receives an input signal (Si), and the signal output end outputs a detection signal (VPD). The N limiting amplifiers generate N amplified signals (Vop1, Vop2, Vop3, Vop4) according to N attenuated signals (Vinp1, Vinp2, Vinp3, Vinp4) having different attenuation. Each rectifier (40A, 40B, 40C, 40D) receives a corresponding amplified signal and outputs a rectified signal. The detection signal (VPD) is associated with the sum of N rectified signals (Io1, Io2, Io3, Io4) outputted from the N rectifiers (40A, 40B, 40C, 40D), and all transistors of the power detector (10, 10B) are bipolar junction transistors.

    POWER DETECTOR WITH ALL TRANSISTORS BEING BIPOLAR JUNCTION TRANSISTORS

    公开(公告)号:EP3709510A2

    公开(公告)日:2020-09-16

    申请号:EP19217298.9

    申请日:2019-12-18

    Abstract: A power detector (10, 10B) has a signal input terminal (Pin), N limiting amplifiers (30A, 30B, 30C, 30D), N rectifiers (40A, 40B, 40C, 40D) and a signal output end. N is an integer greater than 1. The signal input terminal receives an input signal (Si), and the signal output end outputs a detection signal (VPD). The N limiting amplifiers generate N amplified signals (Vop1, Vop2, Vop3, Vop4) according to N attenuated signals (Vinp1, Vinp2, Vinp3, Vinp4) having different attenuation. Each rectifier (40A, 40B, 40C, 40D) receives a corresponding amplified signal and outputs a rectified signal. The detection signal (VPD) is associated with the sum of N rectified signals (Io1, Io2, Io3, Io4) outputted from the N rectifiers (40A, 40B, 40C, 40D), and all transistors of the power detector (10, 10B) are bipolar junction transistors.

    RADIO FREQUENCY DEVICE AND BIAS VOLTAGE GENERATING CIRCUIT THEREOF

    公开(公告)号:EP3609084A1

    公开(公告)日:2020-02-12

    申请号:EP19190680.9

    申请日:2019-08-08

    Abstract: A radio frequency (RF) device (100) and its voltage generating circuit (110) are provided. The RF device (100) includes the voltage generating circuit (110) and a RF circuit (120). The voltage generating circuit (110) receives a RF signal (RFC) and generates at least one bias voltage (VB) related to the RF signal (RFC). The RF circuit (120) is used to receive the RF signal (RFC). The RF circuit (120) is coupled to the voltage generating circuit (110) to receive the bias voltage (VB). The bias voltage (VB) is used to operate the conduction state of at least one RF transmission path of the RF circuit (120).

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