公开(公告)号：US10649158B2

公开(公告)日：2020-05-12

申请号：US16098406

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Johanna M. Swan ,  Aleksandar Aleksov ,  Sasha N. Oster ,  Feras Eid ,  Baris Bicen ,  Thomas L. Sounart ,  Shawna M. Liff ,  Valluri R. Rao

IPC: G02B6/42 ,  G02B6/36

Abstract: Embodiments of the invention include an optoelectronic package that allows for in situ alignment of optical fibers. In an embodiment, the optoelectronic package may include an organic substrate. Embodiments include a cavity formed into the organic substrate. Additionally, the optoelectronic package may include an actuator formed on the organic substrate that extends over the cavity. In one embodiment, the actuator may include a first electrode, a piezoelectric layer formed on the first electrode, and a second electrode formed on the piezoelectric layer. According to an additional embodiment of the invention, the actuator may include a first portion and a second portion. In order to allow for resistive heating and actuation driven by thermal expansion, a cross-sectional area of the first portion of the beam may be greater than a cross-sectional area of the second portion of the beam.

公开(公告)号：US10327331B2

公开(公告)日：2019-06-18

申请号：US15762811

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Nadine L. Dabby ,  Adel A. Elsherbini ,  Braxton Lathrop ,  Sasha N. Oster ,  Aleksandar Aleksov

IPC: H05K1/02 ,  G06F1/16 ,  H05K1/11

Abstract: Some forms relate to a stretchable computing device. The stretchable computing device includes a first layer that includes electrical interconnects at a first density wherein the first layer includes a first electronic component; a stretchable second layer electrically connected to the first layer, wherein the stretchable second layer includes electrical interconnects at a second density that is less than the first density, wherein the second layer includes a second electronic component; and a stretchable third layer electrically connected to the stretchable second layer, wherein the stretchable third layer includes electrical interconnects at a third density that is less than the second density.

公开(公告)号：US10327330B2

公开(公告)日：2019-06-18

申请号：US15762791

申请日：2015-09-24

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Adel A. Elsherbini ,  Javier Soto Gonzalez ,  Dilan Seneviratne ,  Shruti R. Jaywant ,  Sashi S. Kandanur ,  Srinivas Pietambaram ,  Nadine L. Dabby ,  Braxton Lathrop ,  Rajat Goyal ,  Vivek Raghunathan

IPC: H05K1/02 ,  H01L23/14 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/18 ,  H05K3/28 ,  H05K3/34 ,  H05K3/42 ,  H05K3/46 ,  H05K3/20

Abstract: Some forms relate to an example stretchable electronic assembly. The stretchable electronic assembly includes a stretchable body that includes electronic components. A plurality of meandering conductors electrically connect the electronic components. The plurality of meandering conductors may be exposed from the stretchable body. A plurality of conductive pads are electrically connected to at least one of the electronic components or some of the plurality of meandering conductors. The plurality of conductive pads may be exposed from the stretchable body. The stretchable body includes an upper surface and lower surface. The plurality of meandering conductors may be exposed from the lower surface (in addition to, or alternatively to, the upper surface) of the stretchable body.

公开(公告)号：US10314171B1

公开(公告)日：2019-06-04

申请号：US15859321

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Johanna M. Swan

IPC: H05K1/18 ,  H05K3/46 ,  H05K1/03 ,  H05K1/09 ,  H05K3/18 ,  H05K3/34

Abstract: Apparatuses, systems and methods associated with hermetic encapsulation for package assemblies are disclosed herein. In embodiments, a package assembly may include a package substrate that includes a guard ring, wherein the guard ring extends from a surface of the package substrate and around a circumference of a cavity. The package assembly may further include a component coupled to the guard ring by a solder joint along an entirety of the guard ring, wherein the cavity is located between the package substrate and the component and the cavity is hermetically-sealed via the guard ring and the solder joint. Other embodiments may be described and/or claimed.

公开(公告)号：US10269942B2

公开(公告)日：2019-04-23

申请号：US15673359

申请日：2017-08-09

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L29/267 ,  H01L29/423 ,  H01L51/05 ,  H01L29/24 ,  H01L29/786 ,  H01L51/00 ,  H01L21/8258 ,  H01L29/78

Abstract: Described is an apparatus forming complementary tunneling field effect transistors (TFETs) using oxide and/or organic semiconductor material. One type of TFET comprises: a substrate; a doped first region, formed above the substrate, having p-type material selected from a group consisting of Group III-V, IV-IV, and IV of a periodic table; a doped second region, formed above the substrate, having transparent oxide n-type semiconductor material; and a gate stack coupled to the doped first and second regions. Another type of TFET comprises: a substrate; a doped first region, formed above the substrate, having p-type organic semiconductor material; a doped second region, formed above the substrate, having n-type oxide semiconductor material; and a gate stack coupled to the doped source and drain regions. In another example, TFET is made using organic only semiconductor materials for active regions.

公开(公告)号：US10099307B2

公开(公告)日：2018-10-16

申请号：US15676679

申请日：2017-08-14

Applicant: Intel Corporation

Inventor： Ting Zhong ,  Rajashree Raji Baskaran ,  Aleksandar Aleksov

IPC: B23K1/00 ,  B23K1/20 ,  B23K3/06 ,  B23K3/08 ,  B23K35/02 ,  B23K35/24 ,  B23K35/26 ,  B23K35/30 ,  B23K101/42

Abstract: A solder and methods of forming an electrical interconnection are shown. Examples of solders include gallium based solders. A solder including gallium is shown that includes particles of other solders mixed with a gallium based matrix. Methods of applying a solder are shown that include swiping a solder material over a surface that includes a resist pattern. Methods of applying a solder are also shown that include applying a solder that is immersed in an acid solution that provides a fluxing function to aid in solder adhesion.

公开(公告)号：US09992859B2

公开(公告)日：2018-06-05

申请号：US14866693

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Mathew Manusharow ,  Krishna Bharath ,  Zhichao Zhang ,  Yidnekachew S. Mekonnen ,  Aleksandar Aleksov ,  Henning Braunisch ,  Feras Eid ,  Javier Soto

IPC: H05K1/02 ,  H01P3/02 ,  H01P3/08

CPC classification number: H05K1/0245 ,  H01P3/02 ,  H01P3/026 ,  H01P3/08 ,  H01P3/085 ,  H01P3/088

Abstract: Embodiments of the invention include a packaged device with transmission lines that have an extended thickness, and methods of making such device. According to an embodiment, the packaged device may include a first dielectric layer and a first transmission line formed over the first dielectric layer. Embodiments may then include a second dielectric layer formed over the transmission line and the first dielectric layer. According to an embodiment, a first line via may be formed through the second dielectric layer and electrically coupled to the first transmission line. In some embodiments, the first line via extends substantially along the length of the first transmission line.

公开(公告)号：US20180097269A1

公开(公告)日：2018-04-05

申请号：US15282086

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Sasha Oster ,  Telesphor Kamgaing ,  Adel A. Elsherbini ,  Johanna M. Swan ,  Shawna M. Liff ,  Aleksandar Aleksov ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/16 ,  G06F1/18

CPC classification number: H01P3/122 ,  G06F1/182 ,  H01P3/14 ,  H01P3/16 ,  H01P11/006

Abstract: An apparatus comprises a plurality of waveguides, wherein the waveguides include a dielectric material; an outer shell; and a supporting feature within the outer shell, wherein the waveguides are arranged separate from each other within the outer shell by the supporting feature.

公开(公告)号：US20180089984A1

公开(公告)日：2018-03-29

申请号：US15277811

申请日：2016-09-27

Applicant: Intel Corporation

Inventor： Vijay Krishnan Subramanian ,  Steven A. Klein ,  Pramod Malatkar ,  Rajendra C. Dias ,  Aleksandar Aleksov ,  Jason P. Glumbik ,  Nadine L. Dabby

IPC: G08B21/18 ,  H05K1/02 ,  H05K1/18 ,  G01R31/28

CPC classification number: G01R31/2846 ,  H05K1/0268 ,  H05K1/189 ,  H05K2201/09263 ,  H05K2201/10151

Abstract: Techniques and mechanisms for determining a level of degradation of flexible circuitry. In an embodiment, a flexible substrate has disposed therein first circuitry and one or more components coupled thereto, the one or more components to monitor a physical property of the first circuitry. Further disposed in or on the flexible substrate are memory resources to store predefined reference information which corresponds amounts of the physical property each with a different respective level of degradation. Evaluation logic accesses the reference information to determine, based on a detected amount of the physical property, a level of degradation of second circuitry. In another embodiment, the second circuitry is more flexible, as compared to the first circuitry.

公开(公告)号：US20180049309A1

公开(公告)日：2018-02-15

申请号：US15793524

申请日：2017-10-25

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Aleksandar Aleksov ,  Shawna Liff

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/22 ,  H05K3/46 ,  H05K3/30 ,  H05K1/18 ,  H05K3/28 ,  H05K1/03

CPC classification number: H05K1/028 ,  H05K1/0283 ,  H05K1/0393 ,  H05K1/115 ,  H05K1/118 ,  H05K1/181 ,  H05K3/22 ,  H05K3/284 ,  H05K3/301 ,  H05K3/4691 ,  H05K2201/05 ,  H05K2201/057 ,  H05K2201/09263 ,  H05K2201/095 ,  H05K2203/1316

Abstract: Some forms relate to a stretchable computing device that includes a stretchable body; a first electronic component embedded within the stretchable body; a second electronic component embedded within the stretchable body; and wherein the first electronic component and the second electronic component are connected by stretchable electrical connectors that include vias. The stretchable electrical connectors are non-planar and/or may have a partial zig-zag shape and/or a partial coil shape. In some forms, the stretchable computing device further includes a textile attached to the stretchable body.