公开(公告)号：FR2864342B1

公开(公告)日：2006-03-03

申请号：FR0315034

申请日：2003-12-19

Applicant: 3D PLUS SA

Inventor： VAL CHRISTIAN ,  LIGNIER OLIVIER

IPC: H01L23/482 ,  H05K1/18 ,  H05K3/28 ,  H05K3/30

公开(公告)号：FR2911995A1

公开(公告)日：2008-08-01

申请号：FR0700625

申请日：2007-01-30

Applicant: 3D PLUS SA SA

Inventor： VAL CHRISTIAN

IPC: H01L21/48 ,  H01L23/50 ,  H01L25/065

Abstract: L'invention concerne un procédé d'interconnexion de composants électroniques d'une première tranche (T1) avec des composants électroniques d'une deuxième tranche (T2), chaque tranche comportant des vias (1) métallisés qui traversent la tranche dans l'épaisseur. Le procédé comprend les étapes suivantes de :- dépôt d'une goutte (3) d'encre conductrice contenant des solvants, sur chaque via (1) de la première tranche (T1),- empilage de la deuxième tranche (T2) sur la première de manière à ce que les vias (1) de la deuxième tranche (T2) soient sensiblement superposés sur les vias (1) de la première tranche (T1),- élimination de 50 à 90% des solvants contenus dans les gouttes (3) par chauffage ou dépression de façon à obtenir une encre pâteuse,- frittage des gouttes (3) d'encre pâteuse par laser afin de réaliser des connexions (31) électriques entre les vias (1) métallisés superposés.

公开(公告)号：FR2895568B1

公开(公告)日：2008-02-08

申请号：FR0513217

申请日：2005-12-23

Applicant: 3D PLUS SA SA

Inventor： VAL CHRISTIAN

IPC: H01L25/065

Abstract: The invention relates to the collective fabrication of n 3D modules. A batch of n wafers I are fabricated on one and the same plate. This step is repeated K times. The K plates are stacked. Plated-through holes are formed in the thickness of the stack. These holes are intended for connecting the slices together. The stack is cut in order to obtain the n 3D modules. The plate 10, which comprises silicon, is covered on one face 11 with an electrically insulating layer forming the insulating substrate. This face has grooves 20 that define n geometrical features, which are provided with an electronic component 1 connected to electrical connection pads 2′ placed on said face.

公开(公告)号：FR2875672B1

公开(公告)日：2007-05-11

申请号：FR0409974

申请日：2004-09-21

Applicant: 3D PLUS SA SA

Inventor： VAL CHRISTIAN ,  LIGNIER OLIVIER ,  BOCAGE REGIS

IPC: H05K7/20 ,  H01L23/34

Abstract: The present invention relates to an electronic device incorporating a heat distributor. It applies more particularly to devices of the plastic package type, with one or more levels of components. According to the invention, the electronic device, for example of the package type, is provided for its external connection with pads distributed over a connection surface. It includes a thermally conducting plate lying parallel to said connection surface and having a nonuniform structure making it possible, when the device is exposed to a given external temperature, to supply a controlled amount of heat to each external connection pad according to its position on the connection surface. If the device is a package comprising a support of the printed circuit type, the conducting plate will advantageously form an internal layer of said support.

公开(公告)号：FR2884049A1

公开(公告)日：2006-10-06

申请号：FR0505926

申请日：2005-06-10

Applicant: 3D PLUS SA SA

Inventor： VAL CHRISTIAN

IPC: H01L23/498 ,  H01L25/16 ,  H05K3/34

Abstract: L'invention concerne un module électronique (100) comprenant un empilement de n boîtiers (10, 10a, 10b) d'épaisseur E prédéterminée, pourvus sur une surface inférieure de billes de connexion (12) d'épaisseur eb prédéterminée reliées à un circuit imprimé (20, 20a, 20b) d'interconnexion du boîtier. Le circuit imprimé est disposé sur la surface inférieure du boîtier au niveau des billes, présente des percements métallisés (23) dans lesquels sont situées les billes (12) et auxquels elles sont connectées, et a une épaisseur eci inférieure à eb, de manière à obtenir un module d'épaisseur totale ne dépassant pas n (E+ 10% eb).

公开(公告)号：FR2875672A1

公开(公告)日：2006-03-24

申请号：FR0409974

申请日：2004-09-21

Applicant: 3D PLUS SA SA

Inventor： VAL CHRISTIAN ,  LIGNIER OLIVIER ,  BOCAGE REGIS

IPC: H05K7/20 ,  H01L23/34

Abstract: La présente invention concerne un dispositif électronique intégrant un répartiteur de chaleur. Il s'applique plus particulièrement aux dispositifs de type boîtiers plastiques, à un ou plusieurs niveaux de composants.Selon l'invention, le dispositif électronique, par exemple de type boîtier, est muni pour sa connexion externe de plots (11) répartis sur une surface de connexion (22), Il comprend une plaque (23) conductrice de la chaleur, disposée parallèlement à la dite surface de connexion, et présentant une structure non uniforme permettant, lorsque le dispositif est soumis à une température extérieure donnée, un apport de chaleur contrôlée au niveau de chaque plot de connexion externe, en fonction de sa position sur la surface de connexion.Dans le cas où le dispositif serait un boîtier comprenant un support (20) de type circuit imprimé, la plaque conductrice formera avantageusement une couche interne dudit support.

公开(公告)号：FR2857157B1

公开(公告)日：2005-09-23

申请号：FR0307977

申请日：2003-07-01

Applicant: 3D PLUS SA

Inventor： VAL CHRISTIAN ,  LIGNIER OLIVIER

IPC: H01L21/60 ,  H01L21/68 ,  H01L21/98 ,  H01L23/538 ,  H01L25/16 ,  H01L21/58 ,  H01L23/52

Abstract: A method for interconnecting active and passive components in two or three dimensions, and the resulting thin heterogeneous components. The method comprises: positioning and fixing (11) at least one active component and one passive component on a flat support (23), the terminals being in contact with the support, depositing (12) a polymer layer (24) on all of the support and the components, removing the support (14), redistributing the terminals (15) between the components and/or toward the periphery by metal conductors (26) arranged in a predetermined layout, making it possible to obtain a heterogeneous reconstituted structure, heterogeneously thinning (16) the structure by nonselective surface treatment of the polymer layer and at least one passive component (22).

公开(公告)号：FR2832136B1

公开(公告)日：2005-02-18

申请号：FR0114543

申请日：2001-11-09

Applicant: 3D PLUS SA

Inventor： VAL CHRISTIAN

IPC: G02B6/42 ,  B81B7/00 ,  B81B7/02 ,  H01L23/10 ,  H01L23/31 ,  H01L23/34 ,  H01L31/0203 ,  H01L31/024 ,  B65D85/00 ,  B65B31/00

Abstract: The invention relates to a device for the hermetic encapsulation of a component that has to be protected from any stress. The component (5) is fastened to a substrate (15) that carries, on its other face, a temperature-regulating element (17) fastened by adhesive bonding (16). This assembly is placed in a package comprising two portions (11, 12) joined together by adhesive bonding (13) with a passage for optical links (6) and for electrical connections (18, 142). It is supported by protuberances (19) of one portion (11) of the package. Bonded to the other portion (12) is a three-dimensional interconnection block (14) forming the temperature-regulating electronics. The block, the package (11, 12) and a minimum length (L) of the links and connections are encapsulated in a mineral protective layer (4'). The invention applies especially to optoelectronic components and to MEMS components.

公开(公告)号：FR2812453B1

公开(公告)日：2004-08-20

申请号：FR0009731

申请日：2000-07-25

Applicant: 3D PLUS SA

Inventor： VAL CHRISTIAN

IPC: H01G4/33 ,  H01G4/40 ,  H01L23/522 ,  H01L23/552 ,  H01L23/58 ,  H01L23/64 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L21/762

Abstract: The invention relates to a process for the distributed shielding and decoupling of an electronic device having integrated components with three-dimensional interconnection, to such a device and to a production process. The device comprises, associated with each active component (2), at least one capacitor plane formed from a thin sheet (10) of a dielectric, said sheet being metallized (10, 11, 12) on its two plane faces. The components and the capacitor planes are stacked in alternation and joined together to form a block (1'), the lateral faces (21 to 24) of which carry conductors (13, 14) ensuring 3D interconnection. The metallizations (11, 12) are delimited in order to be flush with the edges of the block only via tabs (110, 120). One of the metallizations (11) connected to ground serves as shielding. The invention applies especially to the production of very compact memory blocks.

公开(公告)号：FR2812453A1

公开(公告)日：2002-02-01

申请号：FR0009731

申请日：2000-07-25

Applicant: 3D PLUS SA

Inventor： VAL CHRISTIAN

IPC: H01G4/33 ,  H01G4/40 ,  H01L23/522 ,  H01L23/552 ,  H01L23/58 ,  H01L23/64 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H01L21/762

Abstract: The invention concerns a method for distributed shielding and bypass for an electronic device with integrated components having three-dimensional interconnection, the inventive device and a method for making same. The device comprises, associated with each active component (2), at least a capacitor plane consisting of a thin foil (10) made of metal-coated dielectric material (11, 12) on its two planar surfaces. The components and capacitor planes are stacked and alternately assembled to form a block (1') whereof the side surfaces (21 to 24) bear conductors (13, 14) providing the three-dimensional interconnection. The metal coatings (11, 12) are delimited to be flush with the edges of the block only through tabs (110, 120). One of the metal coatings (11) connected to the ground acts as shield. The invention is particularly useful for producing very compact storage blocks.