METHOD OF DETERMINING THE CORRECT AVERAGE BIAS COMPENSATION VOLTAGE DURING A PLASMA PROCESS
    12.
    发明申请
    METHOD OF DETERMINING THE CORRECT AVERAGE BIAS COMPENSATION VOLTAGE DURING A PLASMA PROCESS 审中-公开
    在等离子体过程中确定正确的平均偏差补偿电压的方法

    公开(公告)号:WO2006004744A3

    公开(公告)日:2006-06-08

    申请号:PCT/US2005022914

    申请日:2005-06-28

    Inventor: HOWALD ARTHUR M

    Abstract: A method for removing a substrate that is attached to a bipolar electrostatic chuck (ESC) by application of a bipolar ESC voltage is provided which includes discontinuing the bipolar ESC voltage after processing a current substrate, and determining a monopolar component error of the processing. The method also includes correcting the monopolar component error for a subsequent substrate.

    Abstract translation: 提供了一种通过施加双极性ESC电压来除去附着在双极静电卡盘(ESC)上的基板的方法,该方法包括在处理当前基板之后停止双极性ESC电压,并确定处理的单极分量误差。 该方法还包括校正后续衬底的单极分量误差。

    METHODS OF LOW-K DIELECTRIC AND METAL PROCESS INTEGRATION
    15.
    发明申请
    METHODS OF LOW-K DIELECTRIC AND METAL PROCESS INTEGRATION 审中-公开
    低K电介质和金属工艺集成的方法

    公开(公告)号:WO2009045864A3

    公开(公告)日:2009-05-22

    申请号:PCT/US2008077764

    申请日:2008-09-26

    Abstract: An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According to one embodiment of the present invention, the integrated process includes planarizing a gapfill metal in low-k dielectric structures, generating a protective layer on the low-k dielectric followed by cleaning the surface of the gapfill metal. Another embodiment of the present invention includes a method of protecting low-k dielectrics such as carbon doped silicon oxide.

    Abstract translation: 一种用于形成使用包括低k电介质和金属的镶嵌结构的电子器件的金属化层的集成方法。 根据本发明的一个实施例,集成工艺包括平面化低k电介质结构中的间隙填充金属,在低k电介质上产生保护层,然后清洁间隙填充金属的表面。 本发明的另一个实施方案包括保护低k电介质如碳掺杂氧化硅的方法。

    METHODS OF LOW-K DIELECTRIC AND METAL PROCESS INTEGRATION
    16.
    发明申请
    METHODS OF LOW-K DIELECTRIC AND METAL PROCESS INTEGRATION 审中-公开
    低K电介质和金属过程集成方法

    公开(公告)号:WO2009045864A2

    公开(公告)日:2009-04-09

    申请号:PCT/US2008/077764

    申请日:2008-09-26

    Abstract: An integrated process for forming metallization layers for electronic devices that use damascene structures that include low-k dielectric and metal. According to one embodiment of the present invention, the integrated process includes planarizing a gapfill metal in low-k dielectric structures, generating a protective layer on the low-k dielectric followed by cleaning the surface of the gapfill metal. Another embodiment of the present invention includes a method of protecting low-k dielectrics such as carbon doped silicon oxide.

    Abstract translation: 用于形成使用包括低k电介质和金属的镶嵌结构的电子器件的金属化层的集成工艺。 根据本发明的一个实施例,集成工艺包括平坦化低k电介质结构中的间隙填充金属,在低k电介质上生成保护层,接着清洁间隙填充金属的表面。 本发明的另一个实施例包括保护诸如碳掺杂氧化硅之类的低k电介质的方法。

    CONTROLLED AMBIENT SYSTEM FOR INTERFACE ENGINEERING
    17.
    发明申请
    CONTROLLED AMBIENT SYSTEM FOR INTERFACE ENGINEERING 审中-公开
    用于界面工程的控制环境系统

    公开(公告)号:WO2008027386A3

    公开(公告)日:2008-08-21

    申请号:PCT/US2007018924

    申请日:2007-08-28

    Abstract: A cluster architecture including a lab-ambient controlled transfer module that is coupled to one or more wet substrate processing modules The lab-ambient controlled transfer module and the one or more wet substrate processing modules manage a first ambient environment having a vacuum transfer module coupled to the lab-ambient controlled transfer module and one or more plasma processing modules The vacuum transfer module and the one or more plasma processing modules manage a second ambient environment A controlled ambient transfer module coupled to the vacuum transfer module and one or more ambient processing modules manage a third ambient environment The cluster architecture therefore enables controlled processing of the substrate in eith the first, second or third ambient environments, as well as dupng associated transitions The embodiments also provide for efficient methods for filling a trench of a substrate

    Abstract translation: 一种集群架构,包括耦合到一个或多个湿式衬底处理模块的实验室环境受控传输模块。实验室环境受控传输模块和一个或多个湿衬底处理模块管理第一环境环境,其具有耦合到 实验室环境控制转移模块和一个或多个等离子体处理模块真空转移模块和一个或多个等离子体处理模块管理第二周围环境。耦合到真空转移模块的受控环境转移模块和一个或多个环境处理模块管理 第三环境环境因此,集群体系结构能够在第一,第二或第三环境环境中进行衬底的受控处理,以及重复相关的过渡。实施例还提供用于填充衬底的沟槽的有效方法

    METHOD AND APPARATUS FOR PRODUCING UNIFORM PROCESSING RATES
    20.
    发明申请
    METHOD AND APPARATUS FOR PRODUCING UNIFORM PROCESSING RATES 审中-公开
    用于生产均匀加工速率的方法和装置

    公开(公告)号:WO2004010457A1

    公开(公告)日:2004-01-29

    申请号:PCT/US2003/022206

    申请日:2003-07-17

    CPC classification number: H01J37/321 H01J37/3299 H01Q7/00 H01Q21/29 H05H1/46

    Abstract: An antenna arrangement for generating an rf field distribution at a plasma generating region inside a chamber wall of a process chamber of a plasma processing apparatus is described. The antenna arrangement includes an rf inductive antenna to which an rf power supply can be connected to supply an rf current to generate a first rf field extending into the plasma generating region. A passive antenna is also provided which is inductively coupled to the rf inductive antenna and configured to generate a second rf field modifying the first rf field. The rf field distribution at the plasma generating region increases the processing uniformity of the processing apparatus compared to that in the absence of the passive antenna.

    Abstract translation: 描述了一种用于在等离子体处理装置的处理室的室壁内的等离子体产生区域处产生射频场分布的天线装置。 天线装置包括一个rf感应天线,rf电源可以连接到rf电源,以提供rf电流以产生延伸到等离子体产生区域中的第一rf场。 还提供无源天线,其被感应耦合到rf感应天线并且被配置为生成修改第一rf场的第二rf场。 与没有无源天线的情况相比,等离子体产生区域的射频场分布增加了处理装置的处理均匀性。

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