Abstract in simplified Chinese:一种封装结构,包括一第一芯片、一第一可选择性电镀环氧树脂、一第一图案化线路层以及复数个第一导通孔。第一芯片包括复数个第一焊垫、一主动表面以及相对主动表面的一背面,第一焊垫设置于主动表面上。第一可选择性电镀环氧树脂,覆盖第一芯片并包含非导电的金属复合物。第一图案化线路层直接设置于第一可选择性电镀环氧树脂的一表面上。第一导通孔直接设置于第一可选择性电镀环氧树脂,以电性连接第一焊垫至第一图案化线路层。
Abstract in simplified Chinese:一种封装结构包括基板、传感芯片、基座、导线架、复数个导通孔及图案化线路层。基板包括组件设置区及复数个电极接点。传感芯片设置于组件设置区并经由图案化线路层与电极接点电性连接。基座以接合面罩覆于基板上并包括容置凹槽、阶梯部、延伸斜面及复数个电极。阶梯部突出于容置凹槽的底面。延伸斜面由阶梯部的顶面延伸至接合面。电极设置于接合面并分别与电极接点电性连接。传感芯片位于容置凹槽内。导线架分别设置于基座与基板。导通孔贯穿阶梯部并电性连接至导线架。图案化线路层设置于延伸斜面上以电性连接导通孔与电极。
Abstract in simplified Chinese:一种封装基板结构包括可选择性电镀环氧树脂、图案化线路层、复数个金属柱、复数个接垫及复数个导通孔。可选择性电镀环氧树脂包括复数个凹穴、相对的第一表面及第二表面。凹穴设置于第一表面上且可选择性电镀环氧树脂包含非导电的金属复合物。金属柱分别设置于凹穴内并突出于第一表面。图案化线路层直接设置于第一表面,可选择性电镀环氧树脂暴露图案化线路层的上表面,此上表面低于第一表面或与第一表面共平面。接垫直接设置于第二表面上。导通孔设置于可选择性电镀环氧树脂内以电性连接接垫至对应的金属柱。
Abstract:
A package structure includes a lead frame, an insulator, a plurality of conductive vias, a patterned metal layer, and a chip. The lead frame includes a plurality of contacts. The insulator covers the lead frame. The conductive vias are disposed on the insulator and connected to the contacts. The patterned metal layer covers an outer surface of the insulator and includes a groove and a circuit portion. The circuit portion is connected to and covers the conductive vias and contacts. The groove surrounds the circuit portion such that the circuit portion is electrically insulated from the rest of the patterned metal layer. A surface of the insulator exposed by the groove is lower than the outer surface. The chip is disposed on the insulator and electrically connected to the circuit portion.
Abstract:
A package structure includes a lead frame, a selective-electroplating epoxy compound, conductive vias and a patterned circuit layer. The lead frame includes a metal stud array having metal studs. The selective-electroplating epoxy compound covers the metal stud array. The selective-electroplating epoxy compound includes non-conductive metal complex. The conductive vias are directly embedded in the selective electroplating epoxy compound to be respectively connected to the metal studs and extended to a top surface of the selective-electroplating epoxy compound. Each of the conductive vias includes a lower segment connected to the corresponding metal stud and an upper segment connected to the lower segment and extended to the top surface, and a smallest diameter of the upper segment is greater than a largest diameter of the lower segment. The patterned circuit layer is directly disposed on the top surface and electrically connected to the conductive vias.
Abstract:
A package structure includes a selective-electroplating epoxy compound, a first patterned circuit layer, second patterned circuit layers, metal studs, contact pads and conductive vias. The selective-electroplating epoxy compound includes cavities, a first surface and a second surface. The cavities disposed on the first surface in array arrangement. The selective-electroplating epoxy compound is formed by combining non-conductive metal complex. The metal studs are disposed in the cavities respectively and protruded from the first surface. The first patterned circuit layer is directly disposed on the first surface. The selective-electroplating epoxy compound exposes a top surface of the patterned circuit layer. The top surface is lower than or coplanar with the first surface. The second patterned circuit layers are directly disposed on the second surface. The conductive vias are disposed at the selective-electroplating epoxy compound to electrically connect the second patterned circuit layers to the corresponding metal studs.
Abstract:
A package structure includes a chip, a selective-electroplating epoxy compound, a patterned circuit layer and a plurality of conductive vias. The chip includes a plurality of solder pads, an active surface and a back surface opposite to the active surface. The solder pads are disposed on the active surface. The selective-electroplating epoxy compound covers the chip and includes non-conductive metal complex. The patterned circuit layer is disposed directly on a surface of the selective-electroplating epoxy compound. The conductive vias are disposed directly at the selective-electroplating epoxy compound to electrically connect the solder pads and the patterned circuit layer.
Abstract:
A ceramic circuit board includes a substrate made of Al2O3 or AlN and having an exterior surface and a groove recessed from the exterior surface. The groove has a bottom surface provided with a roughness Ra of 1-20 μm, a plurality of crests and a plurality of troughs. The crests are located in an imaginary plane separated from the exterior surface at a distance of 1-100 μm. An electro-conductive wire is embedded in the groove and has a top surface flush with the exterior surface. An LED package module includes a ceramic circuit board having two embedded electro-conductive wires, two bonding pads respectively mounted on the top surfaces of the wires, and an LED chip having two contacts electrically connected with the bonding pads respectively. The electro-conductive wire is connected with the substrate firmly and made relatively thicker capable of carrying a relatively larger electric current.
Abstract translation:陶瓷电路板包括由Al 2 O 3或AlN制成并具有外表面和从外表面凹陷的凹槽的基底。 凹槽具有设置有1-20μm粗糙度Ra,多个波峰和多个槽的底表面。 波峰位于与外表面隔开的虚拟平面上,距离为1-100μm。 导电线嵌入槽中并具有与外表面齐平的顶表面。 LED封装模块包括具有两个嵌入式导电线的陶瓷电路板,分别安装在导线顶表面上的两个焊盘,以及分别与焊盘电连接的两个触点的LED芯片。 导电线牢固地与基板连接,并且能够承载相对较大电流的相对较厚。