公开(公告)号：TWI389471B

公开(公告)日：2013-03-11

申请号：TW093134025

申请日：2004-11-05

Applicant: 意法易利信股份有限公司 ,  ST-ERICSSON SA

Inventor： 李岳衡 ,  LI, YUEHENG ,  孫禮 ,  SUN, LI ,  鄔鋼 ,  WU, GANG

IPC: H04B1/7105

公开(公告)号：JP4677645B2

公开(公告)日：2011-04-27

申请号：JP2004179854

申请日：2004-06-17

Applicant: エステ−エリクソン・ソシエテ・アノニムSt−Ericsson Sa

Inventor： マスティオ，ダニエル

IPC: H04L12/28 ,  H04L12/56 ,  H04W8/22 ,  H04W8/26 ,  H04W24/00 ,  H04W84/18 ,  H04W88/06

CPC classification number: H04W8/26 ,  H04W8/22 ,  H04W24/00 ,  H04W84/18 ,  H04W88/06

公开(公告)号：TWI427987B

公开(公告)日：2014-02-21

申请号：TW095123046

申请日：2006-06-26

Applicant: 意法易利信股份有限公司 ,  ST-ERICSSON SA

Inventor： 陳少傑 ,  CHEN, SHAOJIE

IPC: H04L27/26

CPC classification number: H04B1/40

公开(公告)号：US09553546B2

公开(公告)日：2017-01-24

申请号：US14654861

申请日：2014-01-21

Applicant: ST-Ericsson SA

Inventor： Pierangelo Confalonieri ,  Federico Guanziroli ,  Germano Nicollini

IPC: H03F3/217 ,  H03F1/02 ,  H03F3/183 ,  H03F3/21 ,  H03F3/45 ,  H03F1/30 ,  H03F1/32 ,  H03F3/30

CPC classification number: H03F1/0205 ,  H03F1/307 ,  H03F1/3205 ,  H03F3/183 ,  H03F3/211 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/2178 ,  H03F3/3059 ,  H03F3/3064 ,  H03F3/45179 ,  H03F2200/03 ,  H03F2200/351 ,  H03F2203/21142

Abstract: A differential output stage of an amplification device, for driving a load, comprises a first and a second differential output stage portion. The first differential output stage portion comprises: a first and a second output circuit; a first driving circuit comprising a first biasing circuit; a second driving circuit comprising a second biasing circuit. The first differential output stage portion comprises: a third output circuit connected between a first node of said first biasing circuit and a first differential output terminal, having a third driving terminal connected to a first driving terminal; a fourth output circuit connected between a first node of the second biasing circuit and the first differential output terminal, having a fourth driving terminal connected to a second driving terminal.

Abstract translation: 用于驱动负载的放大装置的差分输出级包括第一和第二差分输出级部分。 第一差分输出级部分包括：第一和第二输出电路; 第一驱动电路，包括第一偏置电路; 第二驱动电路，包括第二偏置电路。 第一差分输出级部分包括：连接在所述第一偏置电路的第一节点和第一差分输出端子之间的第三输出电路，具有连接到第一驱动端子的第三驱动端子; 连接在第二偏置电路的第一节点和第一差分输出端子之间的第四输出电路，具有连接到第二驱动端子的第四驱动端子。

公开(公告)号：US09525669B2

公开(公告)日：2016-12-20

申请号：US14440885

申请日：2013-12-05

Applicant: ST-Ericsson SA

Inventor： Ulf Bjorkengren ,  Andreas Anyuru ,  Benn Porscke ,  Patrik Ryd ,  Mats Fagerstrom ,  Mats Bergstrom

IPC: H04L29/06 ,  H04L9/32 ,  H04W4/04

CPC classification number: H04L63/0428 ,  H04L9/3242 ,  H04L63/0421 ,  H04L63/062 ,  H04L2209/24 ,  H04W4/043

Abstract: A method in a first device for anonymously delivering data to a part that has initiated a task is provided. The first device and the part initiating a task are participants in opportunistic sensing. The method comprises creating a data sample and encrypting the data sample with a public key of the task initiating part. After communicating the protected sample to one or more intermediate devices, one of the one or more intermediate devices delivers the protected sample to the task initiating part, such that the task initiating part does not know the identity of the first device. The task initiating device only know the identity of the one of the one or more intermediate devices that delivered the protected sample to the task initiating part, wherein the intermediate devices are participants in the opportunistic sensing.

Abstract translation: 提供了一种用于向已经发起任务的部分匿名传递数据的第一设备中的方法。 第一个设备和启动任务的部分是机会感知的参与者。 该方法包括使用任务启动部分的公钥创建数据样本并加密数据样本。 在将受保护的样本传送到一个或多个中间设备之后，一个或多个中间设备之一将受保护的样本传送到任务启动部分，使得任务启动部分不知道第一设备的身份。 任务启动设备仅知道将受保护样本传递到任务启动部分的一个或多个中间设备之一的身份，其中中间设备是机会感知中的参与者。

公开(公告)号：US20160274173A1

公开(公告)日：2016-09-22

申请号：US15076146

申请日：2016-03-21

Applicant: ST-Ericsson SA

Inventor： Christophe Belet

IPC: G01R31/02 ,  G05F1/46 ,  G01R19/04

CPC classification number: G01R31/028 ,  G01R19/04 ,  G01R31/40 ,  G05F1/46 ,  G05F1/56

Abstract: Electronic device (101) comprising a power source (110), a power management unit (102) coupled to the power source, and a set of loads (103a,103b, 103c,103d), the power management unit comprising a set of voltage regulators blocks (104a,104b, 104c,104d), each voltage regulator block being respectively coupled to an associated load of the set of loads for allowing power transfer from the power source to the load. The electronic device comprises a spike detector block (106), coupled to each of the voltage regulator blocks, and configured to detect a spike in a voltage signal from a voltage regulator block for testing the presence and the operability of a decoupling capacitor (Ca, Cb, Cc, Cd) between an output of the voltage regulator block and an input of the associated load.

Abstract translation: 电子设备（101），包括电源（110），耦合到电源的电源管理单元（102）和一组负载（103a，103b，103c，103d），所述电源管理单元包括一组电压 调节器块（104a，104b，104c，104d），每个电压调节器块分别耦合到该组负载的相关负载，以允许从电源到负载的电力传输。 电子设备包括尖峰检测器块（106），其耦合到每个电压调节器块，并且被配置为检测来自电压调节器块的电压信号中的尖峰，用于测试去耦电容器（Ca， Cb，Cc，Cd）在调压器块的输出和相关负载的输入之间。

公开(公告)号：US09429981B2

公开(公告)日：2016-08-30

申请号：US13784909

申请日：2013-03-05

Applicant: ST-Ericsson SA

Inventor： Håkan Persson

IPC: G06F1/04 ,  G06F1/06 ,  G06F1/10 ,  G06F1/32

CPC classification number: G06F1/06 ,  G06F1/10 ,  G06F1/3203 ,  G06F1/3243 ,  Y02D10/152

Abstract: High frequency current transients, due to logic switching inside the CPU, are reduced by applying clock signals having different relative phases to different parts of the CPU. This reduces the amplitude of current variations, and hence noise induced onto the power supply voltage. In some embodiments, different CPU cores within multi-core CPUs are clocked with a different clock phases. Additionally a method and circuit for low-latency communication in the presence of large OCV effects is provided. The low-latency communication may be based on a FIFO. Strobes are used to indicate safe points in time to update and read signals between transmitter and receiver. The strobes are generated in a central clock generation module. The strobe mechanism is used to transfer the read and write pointers between the transmitter and receiver, while the payload data is transferred using a FIFO data array that allows data writes to be asynchronous to corresponding data reads.

Abstract translation: 通过将具有不同相对相位的时钟信号施加到CPU的不同部分，由于CPU内部的逻辑切换引起的高频电流瞬变被减少。 这降低了电流变化的幅度，并因此降低了对电源电压的感应。 在一些实施例中，多核CPU内的不同CPU内核以不同的时钟相位计时。 另外，提供了在存在大的OCV效应的情况下用于低等待时间通信的方法和电路。 低延迟通信可以基于FIFO。 标记用于指示安全点在更新和读取发射机和接收机之间的信号。 选通在中央时钟发生模块中产生。 选通机制用于在发送器和接收器之间传送读取和写入指针，同时使用允许数据写入与相应数据读取异步的FIFO数据数据传输有效载荷数据。

公开(公告)号：US20160249301A1

公开(公告)日：2016-08-25

申请号：US14761832

申请日：2015-02-22

Applicant: ST-ERICSSON SA

Inventor： Jianfei XIAO ,  Jishui LI ,  Wei LIU

IPC: H04W52/22 ,  H04W52/24 ,  H04W72/04

CPC classification number: H04W52/221 ,  H04W52/243 ,  H04W52/286 ,  H04W52/346 ,  H04W52/38 ,  H04W72/0446 ,  H04W72/1215 ,  H04W88/06

Abstract: A communication method, a communication device for a dual-SIM card-dual-call, DSDC, terminal, and the DSDC terminal are provided. The DSDC terminal includes a first radio frequency subsystem for initiating Packet Switching, PS, service and a second radio frequency subsystem for initiating Circuit Switching, CS, service. The transmission power for the PS service of the first radio frequency subsystem is controlled to be under a predetermined value during a reception timeslot for the CS service of the second radio frequency subsystem, thereby overcoming the problem caused by the interference between two radio frequency subsystems of the DSDC terminal.

Abstract translation: 提供了一种通信方法，用于双SIM卡双呼叫的通信设备，DSDC，终端和DSDC终端。 DSDC终端包括用于发起分组交换，PS，服务的第一射频子系统和用于发起电路交换CS服务的第二射频子系统。 在第二射频子系统的CS服务的接收时隙期间，将第一无线电频率子系统的PS服务的发送功率控制在预定值以下，从而克服由两个无线电频率子系统之间的干扰引起的问题 DSDC终端。

公开(公告)号：US09420538B2

公开(公告)日：2016-08-16

申请号：US14361841

申请日：2012-12-05

Applicant: ST-Ericsson SA

Inventor： Erwan Preteseille ,  Mickael Bouyaud

IPC: H04M11/04 ,  H04W52/02 ,  H04W84/04 ,  H04W48/18 ,  H04W4/22 ,  H04W68/02 ,  H04W36/00 ,  H04W36/14

CPC classification number: H04W52/0232 ,  H04W4/90 ,  H04W36/0083 ,  H04W36/0094 ,  H04W36/14 ,  H04W48/18 ,  H04W52/0212 ,  H04W52/0216 ,  H04W52/0251 ,  H04W68/02 ,  H04W84/045 ,  Y02D70/1222 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/24

Abstract: Limited service state controller (30) for controlling activity of a mobile device (1) when the mobile device is in a limited service state, in which the mobile device camps on an acceptable serving cell of a cellular telecommunication network, the limited service state controller being configured to: get mobile device state information indicating that the mobile device is in the limited service state, get radio environment parameters related to a radio environment of the mobile device, and determine activity parameters to be set in the mobile device based on the mobile device state information and/or the radio environment parameters, for limiting the activity of the mobile device compared to the activity to be done when the mobile device is in a normal service state, while enabling access to an emergency service allowing to make an emergency call.

Abstract translation: 有限服务状态控制器（30），用于在移动设备处于有限服务状态时控制移动设备（1）的活动，其中移动设备驻留在蜂窝电信网络的可接受服务小区上，有限服务状态控制器 被配置为：获取指示所述移动设备处于有限服务状态的移动设备状态信息，获得与所述移动设备的无线电环境相关的无线电环境参数，以及基于所述移动设备确定要在所述移动设备中设置的活动参数 设备状态信息和/或无线电环境参数，用于与移动设备处于正常服务状态时要进行的活动相比较，限制移动设备的活动，同时允许访问允许进行紧急呼叫的紧急服务 。

公开(公告)号：US09413242B2

公开(公告)日：2016-08-09

申请号：US14363056

申请日：2012-12-05

Applicant: ST-Ericsson SA

Inventor： Patrik Arno

IPC: H02M3/158 ,  H02M3/335 ,  H02M1/00

CPC classification number: H02M3/1582 ,  H02M3/33569 ,  H02M2001/007

Abstract: A DC-DC converter has a Step-Up stage connected to a Step-Down stage. A common Step-Down controller is designed and configured such that a single reference voltage is compared to the output voltage of the Step-Down stage by a single comparator, producing a single error signal. The error signal is then compared to two different saw signals to generate first and second pulse-width modulated signals respectively. The first and second pulse-width modulated signals are inputted to a control unit that generates a first pair of control signals and a second pair of control signals, which control switching of the Step-Up stage and of the Step-Down stage.

Abstract translation: DC-DC转换器具有连接到降压级的升压级。 设计并配置了一个通用的降压控制器，使得单个参考电压由单个比较器与降压级的输出电压进行比较，产生单个误差信号。 然后将误差信号与两个不同的锯信号进行比较，以分别产生第一和第二脉冲宽度调制信号。 第一和第二脉冲宽度调制信号被输入到产生第一对控制信号的控制单元和控制升压阶段和降压阶段的切换的第二对控制信号。