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公开(公告)号:CN104022092A
公开(公告)日:2014-09-03
申请号:CN201410264924.2
申请日:2010-06-13
Applicant: 瑞萨电子株式会社
IPC: H01L23/488 , H01L21/60
CPC classification number: H01L24/11 , H01L24/16 , H01L2224/05647 , H01L2224/13099 , H01L2224/16503 , H01L2224/16507 , H01L2224/45144 , H01L2224/49171 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/48
Abstract: 本发明提供一种半导体器件的制造方法,其中半导体器件层叠了半导体芯片或层叠了安装有半导体芯片的布线衬底,在此器件中,层叠了半导体芯片或布线衬底的电极间的连接结构(1)包括:以Cu为主要成分的一对电极(2,3);和夹在一对电极(2,3)之间的由Sn-In类合金形成的焊料层(5),在该焊料层(5)中分散有Sn-Cu-Ni化合物(6)。能在低温、低负荷下可靠连接,连接部即使在层叠工艺、其后的安装工艺等中被加热也能保持形状。
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公开(公告)号:CN102856220A
公开(公告)日:2013-01-02
申请号:CN201210229643.4
申请日:2012-06-29
Applicant: 瑞萨电子株式会社
IPC: H01L21/60
CPC classification number: H01L23/49811 , H01L21/4853 , H01L21/563 , H01L21/6836 , H01L23/49816 , H01L23/49838 , H01L24/13 , H01L24/16 , H01L24/45 , H01L24/81 , H01L24/85 , H01L2221/68327 , H01L2221/6834 , H01L2224/05554 , H01L2224/10175 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/136 , H01L2224/14153 , H01L2224/14155 , H01L2224/1601 , H01L2224/16105 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/32225 , H01L2224/45144 , H01L2224/73204 , H01L2224/81193 , H01L2224/81194 , H01L2224/81385 , H01L2224/814 , H01L2224/81444 , H01L2224/83102 , H01L2224/85 , H01L2224/85203 , H01L2224/94 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2224/11 , H01L2924/00 , H01L2224/48
Abstract: 本发明公开了一种半导体器件的制造方法。提供一种可提高半导体器件可靠性的技术。在倒装芯片的连接工序中,通过对预先装载在突起电极(4)的顶端面的焊锡以及预先涂布在引脚(焊接引线)(11)上的焊锡进行加热,以使其一体化并电连接。其中,所述引脚(11)包括具有第一宽度(W1)的宽截面(第一部分)(11w)和具有第二宽度(W2)的窄截面(第二部分)(11n)。通过对焊锡进行加热,可使配置在窄截面(11n)上的焊锡的厚度比配置在宽截面(11w)上的焊锡的厚度薄。接着,在倒装芯片的连接工序中,将突起电极(4)配置并接合在窄截面(11n)上。由此,可减少焊锡的渗出量。
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公开(公告)号:CN205050835U
公开(公告)日:2016-02-24
申请号:CN201520449677.3
申请日:2015-06-26
Applicant: 瑞萨电子株式会社
IPC: H01L23/498
CPC classification number: H01L23/49568 , H01L22/32 , H01L23/3128 , H01L23/4951 , H01L23/4952 , H01L23/49558 , H01L23/49811 , H01L23/544 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/45 , H01L24/81 , H01L24/97 , H01L25/0657 , H01L2223/5442 , H01L2223/54426 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0392 , H01L2224/0401 , H01L2224/05022 , H01L2224/05166 , H01L2224/05572 , H01L2224/05583 , H01L2224/05624 , H01L2224/05666 , H01L2224/06153 , H01L2224/06155 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13022 , H01L2224/13027 , H01L2224/1308 , H01L2224/13083 , H01L2224/131 , H01L2224/13147 , H01L2224/13155 , H01L2224/16105 , H01L2224/16225 , H01L2224/16238 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/8113 , H01L2224/81191 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06565 , H01L2924/00011 , H01L2924/15311 , H01L2924/15313 , H01L2924/181 , H01L2224/81 , H01L2224/83 , H01L2224/32245 , H01L2924/00012 , H01L2924/00 , H01L2924/00014 , H01L2924/014 , H01L2924/01074 , H01L2924/013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2224/45147
Abstract: 本实用新型提高半导体装置的可靠性。在由保护绝缘膜(PIF)覆盖的焊盘(PD)的探针区域(PBR)形成有探针痕迹(PM)。并且,柱状电极(PE)具有:形成在开口区域(OP2)上的第1部分;和从开口区域(OP2)上向探针区域(PBR)上延伸的第2部分。此时,开口区域(OP2)的中心位置相对于与接合指形部相对的柱状电极(PE)的中心位置偏离。
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公开(公告)号:CN203787415U
公开(公告)日:2014-08-20
申请号:CN201320878884.1
申请日:2013-12-27
Applicant: 瑞萨电子株式会社
IPC: H01L23/498 , H01L23/49
CPC classification number: H01L24/81 , H01L21/561 , H01L21/563 , H01L23/49816 , H01L23/49838 , H01L23/49894 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/743 , H01L24/97 , H01L2224/10175 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81193 , H01L2224/81385 , H01L2224/81801 , H01L2224/83192 , H01L2224/92125 , H01L2924/0132 , H01L2924/0133 , H01L2924/12042 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/01083 , H01L2924/01047 , H01L2924/01029 , H01L2924/0105 , H01L2924/00
Abstract: 本实用新型的课题在于提供一种提高半导体装置的可靠性的半导体装置。在布线基板(3)所具有的芯片搭载面上形成的多个端子(11),在俯视观察下分别为在相邻的宽幅部(11w1、11w2)之间配置有窄幅部(11n)的形状。另外,在搭载于布线基板(3)上的半导体芯片(2)上形成的、多个突起电极(4)各自的顶端面的中心在俯视观察下分别配置在与窄幅部(11n)重叠的位置,将多个端子(11)和多个突起电极(4)经由焊锡材料(5)而电连接。
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