반도체 장치 제조용 로봇 블레이드
    14.
    发明公开
    반도체 장치 제조용 로봇 블레이드 无效
    用于制造半导体器件的机器人刀片

    公开(公告)号:KR1020030003779A

    公开(公告)日:2003-01-14

    申请号:KR1020010039331

    申请日:2001-07-02

    Inventor: 강태균

    Abstract: PURPOSE: A robot blade for fabricating a semiconductor device is provided to precisely and stably transfer a wafer without a slip of the wafer by including a rubber material which has friction force against the surface of the wafer. CONSTITUTION: Projections(110) are formed at both ends of a plate(102) to prevent the wafer from being separated. A supporting surface(104) is formed on the plate. A groove(106) is formed in the supporting surface. A member(108) has friction force against the surface of the wafer, inserted into the groove and protruding to the upper portion of the supporting surface.

    Abstract translation: 目的:提供一种用于制造半导体器件的机器人刀片,通过包括对晶片表面具有摩擦力的橡胶材料来精确而稳定地转移晶片而不会有晶片的滑动。 构成:在板(102)的两端形成突起(110),以防止晶片分离。 支撑面(104)形成在板上。 在支撑面上形成有槽(106)。 构件(108)具有抵抗晶片表面的摩擦力,插入到凹槽中并突出到支撑表面的上部。

    입력 버퍼
    15.
    发明公开
    입력 버퍼 无效
    输入缓冲器

    公开(公告)号:KR1020010061044A

    公开(公告)日:2001-07-07

    申请号:KR1019990063522

    申请日:1999-12-28

    Inventor: 강태균 이영대

    CPC classification number: G11C7/1078 G11C7/1084 H03K19/018528

    Abstract: PURPOSE: An input buffer is provided to use an input buffer by selecting the kind of the input buffer by merging two kinds of input buffers and to be operated with a HSTL input buffer or an LVTTL input buffer. CONSTITUTION: The input buffer includes a control circuit(30), a PMOS transistor(P20) and CMOS transmission gates(T1,T2). The control circuit(30) is composed of inverters(I18,I19,I20), a NOR gate(NOR) and a NAND gate(NAND). The CMOS transmission gate(T1) is connected between an inverter(I6) and an inverter(I10) and the CMOS transmission gate(T2) is connected to an inverter(I1) and an inverter(I10). The gate signal(PDOWNB) is permitted to the PMOS transistor(P20) and the power voltage is permitted to the source and the drain is connected to the output step of the CMOS transmission gate(T1). The output signal of the NAND gate(NAND) and the inverter(I19) is permitted to the CMOS transmission gate(T1) and the output signal of the NOR gate(NOR) and the inverter(I18) is permitted to the CMOS transmission gate(T2).

    Abstract translation: 目的:通过合并两种输入缓冲区并使用HSTL输入缓冲器或LVTTL输入缓冲区来操作输入缓冲器,使用输入缓冲器来选择输入缓冲器的种类。 构成:输入缓冲器包括控制电路(30),PMOS晶体管(P20)和CMOS传输门(T1,T2)。 控制电路(30)由反相器(I18,I19,I20),或非门(NOR)和NAND门(NAND)构成。 CMOS传输门(T1)连接在逆变器(I6)和逆变器(I10)之间,CMOS传输门(T2)连接到逆变器(I1)和逆变器(I10)。 栅极信号(PDOWNB)被允许到PMOS晶体管(P20),并且电源电压被允许到源极,漏极连接到CMOS传输门(T1)的输出步骤。 NAND门(NAND)和反相器(I19)的输出信号被允许到CMOS传输门(T1),并且NOR门(NOR)和反相器(I18)的输出信号被允许到CMOS传输门 (T2)。

    로드록 챔버의 파티클 제거 방법
    16.
    发明公开
    로드록 챔버의 파티클 제거 방법 无效
    用于去除负载仓的颗粒的方法

    公开(公告)号:KR1020010035951A

    公开(公告)日:2001-05-07

    申请号:KR1019990042756

    申请日:1999-10-05

    Inventor: 강태균

    Abstract: PURPOSE: A method for removing particles of a load-lock chamber is provided to collect particles by installing a particle support plate to a load-lock chamber. CONSTITUTION: A particle support plate formed with a multitude of mesh of a constant thickness is installed on a bottom portion of a load-lock chamber. The particles laminated on the particle support plate are removed according to a constant period after operating the load-lock chamber. The particle support plate is formed with a conductive material. The particles are collected with static electricity by applying the voltage to the particle support plate. The thickness of the mesh of the particle support plate is more than a mesh period.

    Abstract translation: 目的:提供一种去除负载锁定室的颗粒的方法,以通过将颗粒支撑板安装到装载锁定室来收集颗粒。 构成:在负载锁定室的底部安装形成有多个具有恒定厚度的网格的颗粒支撑板。 在操作负载锁定室之后,按照恒定时间去除层叠在颗粒支撑板上的颗粒。 颗粒支撑板由导电材料形成。 通过将电压施加到颗粒支撑板上,静电收集颗粒。 颗粒支撑板的网格的厚度大于网格周期。

    반도체 식각장치의 쓰로트 밸브
    17.
    发明公开
    반도체 식각장치의 쓰로트 밸브 无效
    半导体蚀刻系统的节流阀

    公开(公告)号:KR1019990039600A

    公开(公告)日:1999-06-05

    申请号:KR1019970059749

    申请日:1997-11-13

    Inventor: 강태균 김인

    Abstract: 식각제로 이용되는 가스에 내식성이 강한 물질로 구성 부품, 예컨대 플래퍼 또는 섀프트를 구비한 반도체 식각장치에 사용되는 쓰로트 밸브(throttle valve)에 관하여 개시한다. 반도체 식각장치의 쓰로트 밸브는 그 개폐수단으로서, 식각장치 내부에서 사용되는 가스에 대한 내식성이 강한 물질을 이용하여 형성된 플래퍼; 및 상기 플래퍼에 삽입되는 섀프트를 포함하여 구비한다. 이때, 플래퍼는 브롬화수소 및 염소에 대한 내식성이 강한 물질로 이루어지며, 이를 위하여 플래퍼는 애노다이즈된 알루미늄으로 이루어지는 것이 바람직하다. 한편, 상기 애노다이즈된 알루미늄은 알루미늄 합금, 예컨대 2024 알루미늄에 대하여 애노다이즈된 코팅을 하여 이용할 수 있다.

    건식 식각 장치
    20.
    发明公开
    건식 식각 장치 无效
    干蚀设备

    公开(公告)号:KR1020020002787A

    公开(公告)日:2002-01-10

    申请号:KR1020000037084

    申请日:2000-06-30

    Inventor: 원종성 강태균

    Abstract: PURPOSE: A dry etching apparatus for chemically and physically removing layers to be etched by using a plasma state of reactant gas is provided to prevent failures and drawbacks caused by a slit port liner and an EPD port liner projected from a chamber wall. CONSTITUTION: The dry etching apparatus(10) has the chamber wall(13) forming a chamber(11) used for wafer fabrication. And, the apparatus(10) has the slit port liner(33), the EPD port liner(37) and a chamber wall liner(41), all joined to the chamber wall(13). Particularly, the slit port liner(33) and the EPD port liner(37) are inserted in respective corresponding grooves(32,36) formed in the chamber wall(13), and the chamber wall liner(41) is directly attached to an inner surface of the chamber wall(13) without a gap therebetween.

    Abstract translation: 目的:提供一种用于通过使用反应气体的等离子体状态化学和物理去除待蚀刻层的干式蚀刻装置,以防止由腔室壁突出的狭缝端口衬垫和EPD端口衬垫引起的故障和缺点。 构成:干蚀刻装置(10)具有形成用于晶片制造的室(11)的室壁(13)。 并且,该装置(10)具有狭缝端口衬套(33),EPD端口衬套(37)和室壁衬套(41),它们全部连接到室壁(13)。 特别地,狭缝端口衬垫(33)和EPD端口衬套(37)插入形成在室壁(13)中的相应的相应的凹槽(32,36)中,并且室壁衬套(41)直接附接到 室壁(13)的内表面之间没有间隙。

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