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公开(公告)号：KR100562710B1
公开(公告)日：2006-03-23
申请号：KR1020000009588
申请日：2000-02-26
Applicant: 삼성전자주식회사
IPC: H01L21/3213
Abstract: 살리시데이션 공정을 1 단계로 수행할 수 있으며 제품의 특성이 향상된 반도체 장치의 제조 방법이 개시되어 있다. 먼저, 트랜지스터가 형성된 기판의 상부에 Ni, Co 및 TiN 증착층을 차례로 형성하도록 한다. 이후 약 650∼700℃의 온도로 열처리하여 살리시데이션 공정을 수행한다. 산을 사용하여 미반응 금속 물질을 식각하여 제거하고 절연 물질을 도포하여 절연층을 형성하도록 한다. 살리시데이션 공정에 의해 형성된 금속의 실리사이드 영역을 노출시키고 금속성 물질을 도포하여 배선을 형성하도록 한다. Co의 하지막으로 Ni를 사용함에 따라 살리시데이션 공정을 1 단계로 완성할 수 있으며 얻어지는 반도체 장치는 안정된 비저항값을 확보할 수 있기 때문에 장치의 속도를 향상시킬 수 있다.
Abstract translation: 一种制造半导体器件的方法，其中盐析过程可以在一个步骤中进行，并且产品的特性得到改进。 首先，在其上形成晶体管的衬底上依次形成Ni，Co和TiN沉积层。 之后，将衬底在约650至700℃的温度下进行热处理以进行盐化处理。 使用酸将未反应的金属材料蚀刻掉，并涂覆绝缘材料以形成绝缘层。 通过硅化工艺形成的金属的硅化物区域被暴露，并且金属材料被施加以形成布线。 通过使用Ni作为Co的基底膜，可以一步完成硅化工艺，并且所获得的半导体器件可以确保稳定的电阻率值，从而提高器件的速度。
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公开(公告)号：KR1020010084502A
公开(公告)日：2001-09-06
申请号：KR1020000009589
申请日：2000-02-26
Applicant: 삼성전자주식회사
IPC: H01L21/28
Abstract: PURPOSE: A method for forming a metal layer of a semiconductor device is provided to improve a characteristic of a semiconductor device by performing a cobalt salicidation process before forming a contact hole. CONSTITUTION: A gate electrode(44) and a doping region(46) is formed on an upper portion of a silicon substrate(40). Cobalt and Ti are applied thereon by using a chemical vapor deposition method. A TiN layer is formed as a capping layer by sputtering a titanium under a nitrogen gas atmosphere. A Co-salicidation process is performed to form a Co-Ti-Si amorphous layer. A CoSi2 layer and a TiN layer are formed on an upper portion of the Co-Ti-Si amorphous layer. The remaining metal components are removed by using a wet-etching solution. A metal layer(48) including the CoSi2 and the TiN remains only on the doping region. An interlayer dielectric is formed thereon. A contact hole is formed to expose the metal layer(48). An aluminium layer is formed by depositing aluminium thereon. An aluminium wiring(60) is formed by etching the aluminium layer.
Abstract translation: 目的：提供一种用于形成半导体器件的金属层的方法，以在形成接触孔之前通过执行钴盐化处理来改善半导体器件的特性。 构成：在硅衬底（40）的上部形成栅电极（44）和掺杂区（46）。 钴和钛通过使用化学气相沉积法施加在其上。 通过在氮气气氛下溅射钛，形成TiN层作为覆盖层。 进行共 - 水化处理以形成Co-Ti-Si非晶层。 在Co-Ti-Si非晶层的上部形成CoSi 2层和TiN层。 通过使用湿蚀刻溶液除去剩余的金属成分。 包括CoSi 2和TiN的金属层（48）仅保留在掺杂区域上。 在其上形成层间电介质。 形成接触孔以露出金属层（48）。 通过在其上沉积铝形成铝层。 通过蚀刻铝层形成铝布线（60）。
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15.发明授权양질의 코발트 실리사이드막 형성을 위한 개선된 코발트실리사이드 형성 방법 및 이를 이용한 반도체 소자의 제조방법 有权用于形成高质量钴硅化物层的改进的硅化钴形成方法及其使用的半导体器件的制造方法
公开(公告)号：KR100564576B1
公开(公告)日：2006-03-28
申请号：KR1020030066498
申请日：2003-09-25
Applicant: 삼성전자주식회사
IPC: H01L21/24
CPC classification number: C23C14/5806 , C23C14/021 , C23C14/165 , C23C14/5873 , H01L21/28052 , H01L29/665
Abstract: 양질의 코발트 실리사이드막 형성이 가능한 개선된 코발트 실리사이드 형성 방법 및 이를 이용한 반도체 소자의 제조 방법이 제공된다. 실리콘을 포함하는 도전 영역 위에 코발트를 포함하는 막을 형성한 후, 코발트를 포함하는 막 위에 티타늄의 원자% / 나머지 원소의 원자%가 1 보다 큰 티타늄이 풍부한 캡핑막을 형성한다. 이후 열처리에 의해 코발트가 실리콘과 반응하여 코발트 실리사이드막을 형성하도록 한다. 또, 선택적으로 코발트를 포함하는 막의 형성 공정을 고온에서 실시하여 확산 억제 계면막이 형성되도록 한다.
코발트 실리사이드, 캡핑막, 티타늄, 고온 증착-
Patent Agency Ranking16.发明公开양질의 코발트 실리사이드막 형성을 위한 개선된 코발트실리사이드 형성 방법 및 이를 이용한 반도체 소자의 제조방법 有权用于形成优质钴硅酸盐层的改进的钴硅酸盐成型方法和使用该方法制造半导体器件的方法
公开(公告)号：KR1020040034394A
公开(公告)日：2004-04-28
申请号：KR1020030066498
申请日：2003-09-25
Applicant: 삼성전자주식회사
IPC: H01L21/24
CPC classification number: C23C14/5806 , C23C14/021 , C23C14/165 , C23C14/5873 , H01L21/28052 , H01L29/665
Abstract: PURPOSE: An improved cobalt silicide forming method for forming an excellent cobalt silicide layer and a method for manufacturing a semiconductor device using the same are provided to be capable of easily controlling surface resistance. CONSTITUTION: A semiconductor substrate is defined with an insulation region and a silicon region. A predetermined layer containing cobalt is formed on the silicon region of the semiconductor substrate(S3). A capping layer is formed on the predetermined layer(S4). At this time, the titanium atom% to residual element atom% is larger than 1, so that the capping layer has abundant titanium. A heat treatment is performed on the resultant structure for forming a cobalt silicide layer by reacting the cobalt to the silicon of the silicon region.
Abstract translation: 目的：提供用于形成优异的钴硅化物层的改进的硅化钴形成方法和使用其的半导体器件的制造方法，以能够容易地控制表面电阻。 构成：半导体衬底被限定有绝缘区域和硅区域。 在半导体衬底的硅区上形成含有钴的预定层（S3）。 在预定层上形成覆盖层（S4）。 此时，钛原子％与残留元素原子％的比例大于1，因此覆盖层具有丰富的钛。 通过使钴与硅区域的硅反应，对所形成的钴硅化物层的结构进行热处理。
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公开(公告)号：KR1020020078426A
公开(公告)日：2002-10-18
申请号：KR1020010018785
申请日：2001-04-09
Applicant: 삼성전자주식회사
IPC: H01L21/28
Abstract: PURPOSE: A method for fabricating a metal interconnection of a semiconductor device is provided to improve a filling characteristic of aluminum and to reduce a resistance value, by forming a niobium layer of a predetermined thickness before aluminum is deposited. CONSTITUTION: The interlayer dielectric(102) is formed on a semiconductor substrate(100). An opening(104) for the metal interconnection(108) is formed in a predetermined region of the interlayer dielectric. A material layer is deposited on the interlayer dielectric having the opening. A conductive material functioning as the metal interconnection is deposited on the resultant structure having the deposited material layer.
Abstract translation: 目的：提供一种用于制造半导体器件的金属互连的方法，以在铝沉积之前通过形成预定厚度的铌层来改善铝的填充特性并降低电阻值。 构成：层间电介质（102）形成在半导体衬底（100）上。 用于金属互连（108）的开口（104）形成在层间电介质的预定区域中。 材料层沉积在具有开口的层间电介质上。 用作金属互连的导电材料沉积在具有沉积材料层的所得结构上。
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公开(公告)号：KR1020010084501A
公开(公告)日：2001-09-06
申请号：KR1020000009588
申请日：2000-02-26
Applicant: 삼성전자주식회사
IPC: H01L21/3213
Abstract: PURPOSE: A method for manufacturing a semiconductor device is provided to reduce a manufacturing cost by performing a salicidation process of one step instead of a salicidation process of two steps. CONSTITUTION: An active region and a field region are defined on a silicon substrate(30) by forming a field oxide layer(31). A gate electrode(32), a spacer(33), and a doping region(34) are formed on the active region. Nickel is applied on an upper portion of the silicon substrate(30) by using a chemical vapor deposition method. A TiN thin film is formed as a capping layer by sputtering a titanium under a nitrogen gas atmosphere. A gate electrode and a doping region are formed and a Co-Ni-Si compound is formed on an upper portion of the substrate(30) of the exposed doping region by performing a salicidation process. The remaining non-reaction components are removed by using a wet-etching solution. A silicide compound(44) remains only on the doping region and an upper portion of the gate electrode(32). An insulating layer is formed by applying an insulating material thereon. A silicide region is exposed by etching the insulating layer. A wiring is formed by depositing and etching a metal material thereon.
Abstract translation: 目的：提供一种制造半导体器件的方法，通过进行一步的盐析处理而不是两步的盐析处理来降低制造成本。 构成：通过形成场氧化物层（31），在硅衬底（30）上限定有源区和场区。 在有源区上形成栅电极（32），间隔物（33）和掺杂区（34）。 通过使用化学气相沉积法将镍施加在硅衬底（30）的上部。 通过在氮气气氛下溅射钛，形成TiN薄膜作为覆盖层。 形成栅电极和掺杂区，并通过进行盐析处理在曝光的掺杂区的衬底（30）的上部上形成Co-Ni-Si化合物。 通过使用湿蚀刻溶液除去剩余的非反应组分。 硅化合物（44）仅保留在掺杂区域和栅电极（32）的上部。 通过在其上施加绝缘材料形成绝缘层。 通过蚀刻绝缘层来暴露硅化物区域。 通过在其上沉积和蚀刻金属材料形成布线。
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公开(公告)号：KR1020000066420A
公开(公告)日：2000-11-15
申请号：KR1019990013503
申请日：1999-04-16
Applicant: 삼성전자주식회사
IPC: H01L21/28
Abstract: PURPOSE: A method for manufacturing a metal contact of a semiconductor device is provided to stably prevent a diffusion from a contact part to the inside of silicon metal by forming a monocrystal cobalt silicide layer on an interface between a silicon layer and a cobalt layer. CONSTITUTION: A contact window is formed on an insulating layer. A titanium layer(23), a cobalt layer(25) and a titanium nitride layer(24) are sequentially stacked. An annealing process is performed to form a cobalt silicide layer(CoSi2)(28) between the titanium layer and a silicon substrate. Tungsten(26) is stacked.
Abstract translation: 目的：提供一种用于制造半导体器件的金属接触的方法，以通过在硅层和钴层之间的界面上形成单晶钴硅化物层来稳定地防止从接触部分向硅金属内部的扩散。 构成：在绝缘层上形成接触窗。 依次堆叠钛层（23），钴层（25）和氮化钛层（24）。 进行退火处理以在钛层和硅衬底之间形成钴硅化物层（CoSi 2）（28）。 钨（26）堆叠。
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公开(公告)号：KR1020000060417A
公开(公告)日：2000-10-16
申请号：KR1019990008675
申请日：1999-03-15
Applicant: 삼성전자주식회사
IPC: H01L21/28
Abstract: PURPOSE: A method for manufacturing a fuse of a semiconductor device is provided to improve characteristics of the fuse and contact resistance by forming the fuse composed of a Ti layer, a TiN layer and a Ti layer in a sequential order. CONSTITUTION: A method for manufacturing a fuse of a semiconductor device comprises the steps of; forming a contact hole on a semiconductor substrate(100) having a first metal layer and an insulating layer(104), in which the contact hole penetrates the insulating layer and is electrically connected to the first metal layer; forming a first titanium layer(108) on the first insulating layer; forming a titanium nitride layer(110) on the titanium layer; and forming a second titanium layer(112) on the titanium nitride layer.
Abstract translation: 目的：提供一种用于制造半导体器件的熔丝的方法，以通过按顺序形成由Ti层，TiN层和Ti层构成的熔丝来改善熔丝的特性和接触电阻。 构成：制造半导体器件的熔丝的方法包括以下步骤： 在具有第一金属层和绝缘层（104）的半导体衬底（100）上形成接触孔，其中所述接触孔穿过所述绝缘层并电连接到所述第一金属层; 在所述第一绝缘层上形成第一钛层（108）; 在钛层上形成氮化钛层（110）; 以及在所述氮化钛层上形成第二钛层（112）。
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