公开(公告)号：KR1020090114180A

公开(公告)日：2009-11-03

申请号：KR1020080039984

申请日：2008-04-29

Applicant: 삼성전자주식회사

Inventor： 김대현 ,  박광일 ,  김경호 ,  김현진 ,  김혜란

IPC: G11C11/4076 ,  G11C11/4091

CPC classification number: G11C8/18 ,  G11C7/08 ,  G11C8/12 ,  G11C11/4076 ,  G11C11/4091

Abstract: PURPOSE: A semiconductor memory device and an accessing method thereof are provided to improve access performance by performing a normal access operation about the same bank group even through a command is received by the first variable access time. CONSTITUTION: A cell array(110) is composed of a plurality of bank groups with a plurality of banks. A mode register set(170) saves the first access time information. A bank decoder(140) selects the bank by decoding the bank address. A control signal generator(180) receives the command for accessing the same bank group with the first variable access time as the cycle. A control signal generator generates a control signal with the pulse width corresponding to the first access time in response to the command, the bank address, the decoded bank address, and the first access time. A sense amplifier writes and reads the data about the selected bank.

Abstract translation: 目的：提供一种半导体存储器件及其访问方法，以便即使通过第一可变存取时间接收到的命令，也可以通过对相同存储体组执行正常的存取操作来提高访问性能。 构成：单元阵列（110）由具有多个堤的多个堤岸组成。 模式寄存器组（170）保存第一访问时间信息。 银行解码器（140）通过解码银行地址来选择银行。 控制信号发生器（180）以第一可变访问时间作为周期接收用于访问相同存储体组的命令。 控制信号发生器响应于命令，存储体地址，解码的存储体地址和第一存取时间，产生具有与第一存取时间对应的脉冲宽度的控制信号。 读出放大器写入并读取有关所选存储体的数据。