반도체 장치의 콘택 플러그 형성 방법
    11.
    发明公开
    반도체 장치의 콘택 플러그 형성 방법 无效
    制造半导体器件接触片的方法

    公开(公告)号:KR1020000021052A

    公开(公告)日:2000-04-15

    申请号:KR1019980039973

    申请日:1998-09-25

    Abstract: PURPOSE: A method for manufacturing contact plug is provided to use selective deposition process in semiconductor device. CONSTITUTION: An isolated inter layer(102) provided in semiconductor substrate is partially etched to form a contact hole(102a). A barrier metal layer(104) is formed onto the isolated inter layer comprising a contact hole. Negative photoresist layer is formed on barrier metal layer as to fill completely contact hole. By further using contact hole forming mask, negative photoresist layer is etched to form photoresist pattern. After photoresist pattern is flowed, barrier metal layer is etched using the reflowed photoresist pattern as mask so as to expose the upper surface of the isolated inter layer on both sides of contact hole. After removing photoresist pattern, a tungsten layer is selectively deposited onto the barrier layer as to fill contact hole, thereby forming a tungsten contact plug(108). Therefore, it enables tungsten to deposit onto desired region, resulting in selectively forming a tungsten contact plug onto desired region without etching process.

    Abstract translation: 目的:提供一种用于制造接触插塞的方法,以在半导体器件中使用选择性沉积工艺。 构成:设置在半导体衬底中的隔离层(102)被部分蚀刻以形成接触孔(102a)。 在包括接触孔的隔离层间层上形成阻挡金属层(104)。 在阻挡金属层上形成负光致抗蚀剂层以填满完全接触孔。 通过进一步使用接触孔形成掩模,蚀刻负性光致抗蚀剂层以形成光致抗蚀剂图案。 在光致抗蚀剂图案流动之后,使用回流光致抗蚀剂图案作为掩模蚀刻阻挡金属层,以暴露接触孔两侧的隔离层间的上表面。 在去除光致抗蚀剂图案之后,钨层被选择性地沉积到阻挡层上以便填充接触孔,从而形成钨接触插塞(108)。 因此,能使钨沉积到所需区域上,导致钨接触塞选择性地形成所需区域而不进行蚀刻工艺。

    식각장비에 사용되는 스테이지
    12.
    实用新型
    식각장비에 사용되는 스테이지 无效
    用于蚀刻设备的阶段

    公开(公告)号:KR2019970015298U

    公开(公告)日:1997-04-28

    申请号:KR2019950027073

    申请日:1995-09-29

    Abstract: 본고안은웨이퍼의막질의균일성의저하와포토레지스트의발화를방지할수 있는스테이지에관해게시한다. 본고안에의한스테이지의구조는높이와크기가다른두 개의평판으로구성되며작은평판이상부에제작된장치로되어있으며, 상기상층과하층의높이는 2.0mm 이상인것이특징이다.

    이중 전원 방식 식각 장치의 전원 공급 방법
    13.
    发明公开
    이중 전원 방식 식각 장치의 전원 공급 방법 无效
    使用双电源方式提供电力来进行电子装置的方法

    公开(公告)号:KR1020030013144A

    公开(公告)日:2003-02-14

    申请号:KR1020010047481

    申请日:2001-08-07

    Abstract: PURPOSE: A method for supplying electric power to an etch apparatus using a double power method is provided to perform a normal etch process by restricting formation of polymer in an etch apparatus using the double power method. CONSTITUTION: Top power of 200W lower than a target level of 1300W is applied to an upper electrode of an etch chamber. Bias power lower than the target level of 1300W is applied to a lower electrode of the etch chamber after the top power is applied to the upper electrode of the etch chamber and one second passes by. The target level of 1300W is applied to the upper electrode after the bias power is applied to the lower electrode of the etch chamber and a half second passes by. The bias power of 1500W is applied to the lower electrode after the bias power applied to the lower electrode approaches 550W or the bias power is applied to the lower electrode and one second passes by.

    Abstract translation: 目的:提供一种使用双倍功率方法向蚀刻装置供电的方法,以通过限制使用双功率法在蚀刻装置中形成聚合物来执行正常蚀刻工艺。 构成:将低于目标1300W功率的200W的最高功率施加到蚀刻室的上部电极。 在将顶部功率施加到蚀刻室的上电极并且一秒钟之后,将低于1300W的目标水平的偏压功率施加到蚀刻室的下电极。 在将偏置功率施加到蚀刻室的下电极并经过半秒之后,将1300W的目标电平施加到上电极。 在施加到下电极的偏置功率接近550W之后,向下电极施加1500W的偏置功率,或者将偏置功率施加到下电极,并且一秒钟经过。

    플라즈마형 에칭 장비의 전력 인가 방법
    14.
    发明公开
    플라즈마형 에칭 장비의 전력 인가 방법 无效
    等离子体蚀刻装置的供电方法

    公开(公告)号:KR1020020057688A

    公开(公告)日:2002-07-12

    申请号:KR1020010000215

    申请日:2001-01-03

    Abstract: PURPOSE: A power supplying method of a plasma-type etch apparatus is provided to improve an operational stability and to prevent a damage due to a reflected power by improving a method. CONSTITUTION: A top-power has a 60MHz high frequency and a bottom-power has a 2MHz frequency. After mounting a substrate on an etch chamber, a power of 200 Watt is firstly supplied to the top-power and an etchant gas is simultaneously supplied. After passing one second, the bottom-power is gradually increased from 0 Watt to 550 Watt for one second. In the middle of the increasement of the bottom-power, the top-power is vertically increased to 1600 Watt. And the bottom-power is also vertically increased to 1500 Watt when arriving at the 550 Watt. At this point, a reflected power is minimized to 20 Watt when supplying bottom-power because the top-power is supplied with the 200 Watt as a minimal power for forming a plasma.

    Abstract translation: 目的:提供等离子体蚀刻装置的供电方法,以通过改进方法来提高操作稳定性并防止由反射功率引起的损坏。 构成:顶级功率具有60MHz的高频,底部功率具有2MHz的频率。 将衬底安装在蚀刻室上之后,首先将功率为200瓦的电源提供给顶部电源,同时提供蚀刻剂气体。 经过一秒钟后,底功率从0瓦逐渐增加到550瓦1秒。 在底部功率增加的中间,顶部功率垂直增加到1600瓦。 而当达到550瓦特时,底部功率也垂直增加到1500瓦特。 此时,当提供底功率时,反射功率最小化到20瓦,因为顶部功率作为用于形成等离子体的最小功率提供200瓦特。

    소자간의 콘택 형성 방법
    15.
    发明授权
    소자간의 콘택 형성 방법 失效
    在设备之间形成联系的方法

    公开(公告)号:KR100308204B1

    公开(公告)日:2001-11-01

    申请号:KR1019990033139

    申请日:1999-08-12

    Abstract: 본발명은반도체제조방법중 소자간의콘택형성방법에관한것으로, 비트라인을형성할때, 상기비트라인사이에콘택패드를동시에형성한다. 그리고나서, 상기콘택패드상부에콘택플러그를형성하므로오정렬마진을줄일수 있다. 또한, 상기콘택패드와비트라인간의충분한격리마진을확보할수 있으며상기콘택플러그와콘택패드간의접촉면적을확보할수 있어서콘택저항을줄일수 있는효과가있다.

    반도체 제조공정에 사용되는 드라이 세척장치 및 세척방법
    16.
    发明公开
    반도체 제조공정에 사용되는 드라이 세척장치 및 세척방법 无效
    干燥清洁装置和制造半导体的方法

    公开(公告)号:KR1020010026045A

    公开(公告)日:2001-04-06

    申请号:KR1019990037188

    申请日:1999-09-02

    Inventor: 서정근

    Abstract: PURPOSE: A dry-cleaning apparatus is provided to prevent a defect of a semiconductor device caused by polymer not completely eliminated, by effectively setting an interval of time taken for a dry-cleaning process according to the quantity of the polymer formed in a process chamber. CONSTITUTION: A gas supply unit(180) supplies gas into a process chamber(110). A radio frequency(RF) supplying unit(170) supplies RF power to an electrode installed inside the process chamber. A detecting unit detects impedance formed in the process chamber. A controller(200) controls operation of the gas supply unit and the RF power supplying unit, and stops the gas supply unit when the impedance inputted from the impedance detecting unit reaches a predetermined value.

    Abstract translation: 目的:提供一种干洗设备,通过根据在处理室中形成的聚合物的量有效地设定干洗过程所需的时间间隔,以防止由聚合物引起的半导体器件的缺陷完全消除 。 构成:气体供应单元(180)将气体供应到处理室(110)中。 射频(RF)供给单元(170)向安装在处理室内部的电极提供RF功率。 检测单元检测处理室中形成的阻抗。 控制器(200)控制气体供应单元和RF供电单元的操作,并且当从阻抗检测单元输入的阻抗达到预定值时,停止气体供应单元。

    챔버라이너 정렬방법
    17.
    发明公开
    챔버라이너 정렬방법 失效
    用于对准线性线的方法

    公开(公告)号:KR1020000015475A

    公开(公告)日:2000-03-15

    申请号:KR1019980035402

    申请日:1998-08-29

    Inventor: 서정근

    Abstract: PURPOSE: A method for aligning a chamber linear is provided to easily align a linear and a body of a chamber and, always equally and exactly, align in a procedure which a worker decomposes and assembles a body of the camber and linear. CONSTITUTION: A method for aligning a chamber linear is to assemble a body(10) of a the chamber and a chamber linear(20). The method for aligning a chamber linear includes forming a combining part at a predetermined spot of the chamber linear and the body of a chamber, combining the chamber linear to the body of the chamber based on the combining part, thereby aligning the chamber linear to the body of the chamber.

    Abstract translation: 目的:提供一种用于对准腔室线性的方法,以便容易地对准腔室的直线和主体,并且总是相等和精确地对准在工作人员分解并组装弧形体并且线性的过程中。 构成:用于对准室线性的方法是组装室的主体(10)和室线性(20)。 用于对准腔室线性的方法包括在腔室线性的预定点和室的主体处形成组合部分,其基于组合部分将腔室线性地组合到腔室的主体,从而将腔室线性对准 房间的身体

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