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公开(公告)号：KR1020120059713A
公开(公告)日：2012-06-11
申请号：KR1020100121106
申请日：2010-12-01
Applicant: 삼성전자주식회사
IPC: H04N5/378 , H04N5/365 , H04N5/361 , H01L27/146
CPC classification number: H04N5/361 , H04N5/3653 , H04N5/378 , H01L27/14603 , H01L27/14609
Abstract: PURPOSE: A sampling circuit, a sampling method, and an optical sensing apparatus are provided to minimize interference due to offset in case a signal of a unit cell is weak. CONSTITUTION: An offset compensation reference signal generating unit(30a) inputs a first signal including offset information. The offset compensation reference signal generating unit compensates for the offset information of a reference signal. The offset compensation reference signal generating unit generates the compensated reference signal. A comparing unit(21) inputs a second signal including data information.
Abstract translation: 目的：提供采样电路，采样方法和光学感测装置，以在单元的信号较弱的情况下最小化由于偏移引起的干扰。 构成：偏移补偿参考信号生成单元（30a）输入包括偏移信息的第一信号。 偏移补偿参考信号生成单元补偿参考信号的偏移信息。 偏移补偿基准信号生成部生成补偿基准信号。 比较单元（21）输入包括数据信息的第二信号。
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公开(公告)号：KR1020120058337A
公开(公告)日：2012-06-07
申请号：KR1020100120067
申请日：2010-11-29
Applicant: 삼성전자주식회사
IPC: H04N5/335
Abstract: PURPOSE: A CDS(Correlated Double Sampling) circuit, an operating method thereof, and devices with the same are provided to distribute pixel signals and ramp signals respectively by capacitive dividing, thereby compressing the pixel signals and the ramp signals. CONSTITUTION: A signal compressor(150-1) compresses pixel signals and ramp signals by capacitive dividing. The signal compressor outputs the compressed pixel signals and the compressed ramp signals. A comparator(160) compares the compressed pixel signals with the compressed ramp signals. The comparator outputs a comparison signal corresponding to the comparison result.
Abstract translation: 目的：提供CDS（相关双采样）电路及其操作方法及其装置，以通过电容分压分别分配像素信号和斜坡信号，从而压缩像素信号和斜坡信号。 构成：信号压缩器（150-1）通过电容分压来压缩像素信号和斜坡信号。 信号压缩器输出压缩像素信号和压缩斜坡信号。 比较器（160）将压缩的像素信号与压缩的斜坡信号进行比较。 比较器输出与比较结果对应的比较信号。
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公开(公告)号：KR1020100092771A
公开(公告)日：2010-08-23
申请号：KR1020090012055
申请日：2009-02-13
Applicant: 삼성전자주식회사
Abstract: PURPOSE: A two-path sigma-delta analog-to-digital converter and an image sensor including the same are provided to process two different inputs through one calculating amplifier by shaping the calculating amplifier. CONSTITUTION: An integrator(510) divides a clock signal into a front cycle and a back cycle by sharing one calculating amplifier. The integrator integrates a first input signal during the back cycle. The integrator integrates a second input signal during the first cycle. A quantizer(540) quantizes a signal which is integrated through the integrator and outputs first and second digital signals. A feedback path(550) feeds-back the first and the second digital signals.
Abstract translation: 目的：提供一个双通道Σ-Δ模数转换器和一个包含该二通道Σ-Δ模数转换器的图像传感器，通过整形计算放大器，通过一个计算放大器来处理两个不同的输入。 构成：积分器（510）通过共享一个计算放大器将时钟信号分为前周期和后周期。 积分器在后循环中集成了第一个输入信号。 积分器在第一个周期内集成了第二个输入信号。 量化器（540）量化通过积分器积分的信号并输出第一和第二数字信号。 反馈路径（550）反馈第一和第二数字信号。
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公开(公告)号：KR1020100083250A
公开(公告)日：2010-07-22
申请号：KR1020090002542
申请日：2009-01-13
Applicant: 삼성전자주식회사
IPC: H04N5/357 , H04N5/3745
CPC classification number: H04N5/3658 , H04N5/378
Abstract: PURPOSE: An image sensor and an image pick-up device is provide to maximally restraint a phenomena which switching noise is kicked-back to a pixel. CONSTITUTION: A plurality of pixels(21) is connected to column line. A plurality of pixels comprises photoelectric conversion element. A signal processing unit(61) processes a signal outputted from the column line according to switching operation. A kickback noise blocking circuit(51) is connected in between the column line and the signal processing circuit for reducing kick-back noise generated according to the switching operation.
Abstract translation: 目的：提供图像传感器和图像拾取装置，以最大限度地限制开关噪声被踢回到像素的现象。 构成：将多个像素（21）连接到列线。 多个像素包括光电转换元件。 信号处理单元（61）根据切换操作处理从列线输出的信号。 在列线和信号处理电路之间连接有反冲噪声阻断电路（51），用于减少根据切换操作产生的反冲噪声。
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公开(公告)号：KR1020090123206A
公开(公告)日：2009-12-02
申请号：KR1020080049175
申请日：2008-05-27
Applicant: 삼성전자주식회사 , 연세대학교 산학협력단
CPC classification number: H04N5/37455 , H03H17/0664 , H03M3/424 , H03M3/462
Abstract: PURPOSE: A decimation filter minimizing the area of an image sensor, an analog to digital converter and an image sensor including the same are provided to accurately perform the decimation of the pixel signal modulated in sigma-delta. CONSTITUTION: A first digital data generator(16) integrates M bit pixel data based on M bit pixel data based on bit pixel data. The first digital data generator outputs N bit pixel data based on an integral result. A second digital data generator(18) generates P bit pixel data based on an integral result after N bit pixel data is integrated. The second digital data generator outputs P bit pixel data which is as the decimated data.
Abstract translation: 目的：提供使图像传感器，模数转换器和包括其的图像传感器的面积最小化的抽取滤波器，以精确地执行以Σ-Δ调制的像素信号的抽取。 构成：第一数字数据发生器（16）基于位像素数据基于M位像素数据来集成M位像素数据。 第一数字数据发生器基于积分结果输出N位像素数据。 第二数字数据发生器（18）在N位像素数据被积分之后基于积分结果产生P位像素数据。 第二数字数据发生器输出作为抽取数据的P位像素数据。
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Patent Agency Ranking
公开(公告)号：KR100878305B1
公开(公告)日：2009-01-14
申请号：KR1020060102577
申请日：2006-10-20
Applicant: 삼성전자주식회사
IPC: H04N5/378 , H04N5/3745
Abstract: 씨모스 이미지 센서는, 복수의 픽셀 센서들이 행들과 열들로 배열된 픽셀 센서 어레이, 그리고 상기 열들에 각각 관련있는 복수의 전달 회로들을 포함한다. 상기 픽셀 센서들 각각은, 램프 전압을 입력받고, 리셋 전압과 외부로부터 입력된 영상 정보에 대응하는 픽셀 신호 전압의 차와 상기 램프 전압을 비교하고, 비교 신호를 출력하며, 상기 전달 회로들 각각은, 관련있는 픽셀 센서로부터의 상기 비교 신호를 외부로 전달한다.
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公开(公告)号：KR100832846B1
公开(公告)日：2008-05-28
申请号：KR1020060112968
申请日：2006-11-15
Applicant: 삼성전자주식회사
CPC classification number: H04N5/235 , H04N5/2355
Abstract: 본 발명에 따른 W(White) 화소를 가지는 영상 촬상 소자의 영상 촬상 방법은: (a) W 화소들을 이용하여 복수번 영상을 촬상하는 단계; 및 (b) 상기 (a) 단계 이후, 상기 W 화소들을 제외한 화소들을 이용하여 영상을 촬상하는 단계를 포함한다.
W 화소, 멀티 촬상-
18.发明公开
公开(公告)号：KR1020080043142A
公开(公告)日：2008-05-16
申请号：KR1020060111800
申请日：2006-11-13
Applicant: 삼성전자주식회사
CPC classification number: H04N5/378 , H01L27/14643 , H04N5/3535
Abstract: A CMOS image sensor, a digital cameral including the same and an image signal detecting method of the CMOS image sensor are provided to connect an output of a pixel using no source follower directly to a comparator, thereby expanding a dynamic range and reducing noise. A CMOS(Complementary Metal Oxide Semiconductor) image sensor(100) comprises a timing controller(10), a pixel array unit(20), an ADC(Analog-Digital Converter)(30), and a buffer(40). The ADC comprises a comparator(31), a counter(32) and a lamp voltage generator(33). A switch transmits a signal, sensed by a photo diode, to a sensing node. The comparator is directly and electrically connected to the sensing node, and compares the sensed signal of the sensing node with a reference signal.
Abstract translation: 提供一种CMOS图像传感器，包括该CMOS图像传感器的数字摄像机和图像信号检测方法，用于将不使用源极跟随器的像素的输出直接连接到比较器，从而扩展动态范围并降低噪声。 CMOS（互补金属氧化物半导体）图像传感器（100）包括定时控制器（10），像素阵列单元（20），ADC（模拟数字转换器）（30）和缓冲器（40）。 ADC包括比较器（31），计数器（32）和灯电压发生器（33）。 开关将由光电二极管感测的信号发送到感测节点。 比较器直接和电连接到感测节点，并将感测节点的感测信号与参考信号进行比较。
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公开(公告)号：KR100790969B1
公开(公告)日：2008-01-02
申请号：KR1020050077532
申请日：2005-08-23
Applicant: 삼성전자주식회사
CPC classification number: H04N5/3742 , H04N5/3575 , H04N5/378
Abstract: 화질 개선을 위하여 자동 교정된 램프 신호를 이용한 이미지 센서 및 방법이 개시된다. 상기 이미지 센서에서는, 램프 신호 생성부가 디지털 목표 코드와 기준 코드를 비교하여 그 비교 결과에 따라 램프 신호를 생성하고, 생성된 램프 신호(VRAMP)를 메인 단일 기울기 ADC 내의 CDS 회로 어레이와 상기 램프 신호 생성부 내의 단일 기울기 ADC로 동시에 피드백한다. 상기 피드백된 램프 신호는 아날로그 기준 전압들에 대응되는 상기 디지털 기준 코드가 후속 프로세서로부터 피드백된 상기 디지털 목표 코드와 일치하는 방향으로 지속적인 교정이 이루어진다. 이와 같이 생성되는 램프 신호는 4 컬러 채널별 또는 2 채널씩 각각 콘트롤되는 아날로그 게인에 따라 각 컬러에 적응적으로 교정되어 공급된다.
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公开(公告)号：KR1020010001732A
公开(公告)日：2001-01-05
申请号：KR1019990021149
申请日：1999-06-08
Applicant: 삼성전자주식회사
Inventor： 함석헌
IPC: H03K17/00
Abstract: PURPOSE: An output driver having a simultaneous switching current reduction function between powers is provided to reduce bouncing noise and an EMI(Electromagnetic Interference) by differing each switching time of output driver cells. CONSTITUTION: In simultaneously feeding a control signal or data through external input terminals(In1-IknN), delay buffers delay the received signals as a number of delay buffers. Switched times of each output driver cell are differed by the differently fed signal. Thereby, simultaneously flowed excessive switching current between powers is reduced. Therefore, a ground bouncing or a power bouncing noise is reduced.
Abstract translation: 目的：提供在功率之间具有同时开关电流降低功能的输出驱动器，以通过输出驱动器单元的每个切换时间的不同来减少跳动噪声和EMI（电磁干扰）。 构成：在通过外部输入端子（In1-IknN）同时馈送控制信号或数据时，延迟缓冲器将接收到的信号延迟为多个延迟缓冲器。 每个输出驱动单元的切换时间由不同的馈送信号而不同。 因此，功率之间同时流过的过大的开关电流减小。 因此，减少地面弹跳或电力弹跳噪音。
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