Abstract:
본 발명은 전원 인가시 공핍형 접합형 전계효과 트랜지스터를 과전류에 의한 파괴로부터 보호하기 위한 보호회로 및 이를 이용한 전원장치에 관한 것으로, 정류된 직류전압을 충전하는 두 개의 DC 링크 캐패시터; 상위 DC 링크 캐패시터의 양단에 일반적인 전원회로를 구성하고 하위 DC 링크 캐패시터의 양단에는 상시개통 특성의 접합형 전계효과 트랜지스터를 초기 전원투입시 발생하는 돌입전류로부터 보호하며 접합형 전계효과 트랜지스터를 턴오프시키기에 충분한 전압을 공급해주는 레귤레이터;를 포함하여 구성되는 것을 특징으로 하는 공핍형 접합형 전계효과 트랜지스터 보호회로 및 이 보호회로가 적용된 플라이백(flyback), 피드포워드(feedforward), 하프브리지(half-bridge), 풀브리지(full-bridge) 형의 전원장치를 기술적 요지로 한다. 이와 같은 본 발명에 의한 보호회로는 구성이 간단하여 값싼 비용으로서 접합형 전계효과 트랜지스터의 장점을 살릴 수 있는 전원장치를 구현할 수 있는 장점이 있다. 공핍형 접합형 전계효과 트랜지스터, 도출전류, 보호회로, 레귤레이터
Abstract:
PURPOSE: A manufacturing method of the silicon carbide semiconductor device is provided to improve a movement characteristic of the device by reducing a specific contact resistance with maximizing a contact area of an electrode. CONSTITUTION: A spacer insulating film(21-1) is formed on the sidewall of a concavo-convex(11) with mixing a front side formation of the insulating film and an anisotropy etching process. An electrode is simultaneously formed on an upper and a lower part of the concavo-convex exposed a semiconductor material with a thermal process after forming a predetermined metal film(51) on the front. The metal film is selectively removed remaining on the spacer insulating film using a wet etching or a dry etching process. The silicon carbide semiconductor device is a junction field effect transistor. The silicon carbide semiconductor device is a metal-insulating layer field effect transistor.
Abstract:
A field effect transistor having a junction barrier schottky gate structure and a manufacturing method thereof are provided to improve a switching property by reducing a parasitic capacitance generated between a gate and a drain. A field effect transistor comprises a gate electrode(200), a high concentration P type junction barrier schottky, a high concentration N type SiC semiconductor(210), a source electrode(220), a high concentration P type semiconductor(240), a drift layer(260), a high concentration N type SiC substrate(270), and a drain electrode(280). The gate electrode is positioned on a top end of a trench(1) structure. The drain electrode is contacted in a bottom of the substrate. The high concentration P type junction barrier schottky reduces a leakage current under an electrode, and increases a breakdown voltage. The source electrode is contacted in the high concentration N type SiC semiconductor. The high concentration P type semiconductor is formed under the high concentration P type SiC semiconductor and the source electrode.
Abstract:
The method of manufacturing the silicon carbide junction field effect transistor is provided to facilitate the junction field effect transistor in which on-resistance is low and the dielectric breakdown voltage is high. The method of manufacturing the silicon carbide junction field effect transistor comprises as follows. The first step is for forming the n+ source area(11) and mesa structure in order to make the recessed gate structure junction field effect transistor in the n-type silicon carbide substrate. The second step is for performing the thing ion-implanting(aluminum, the beryllium and boron) for forming the p-type gate(aluminum and beryllium) to the p-type dopant ion injection. The third step is for performing the dopant activation and diffusion, and the thermal process for removing the lattice damage. The fourth stage is for completing the transistor manufacture after the series of production process including the metallization process for the electrode metallization and passivation process. Aluminum and boron are ion-implanted in the second step at together.
Abstract:
A silicon carbide semiconductor gas sensor and a manufacturing method thereof are provided to measure a broad range of hydrogen concentration by using a silicon carbide MOSFET device for low hydrogen concentration and a sensing resistance type sensor device for high hydrogen concentration. A p type silicon carbide epitaxial layer(202) is formed on an n+ type silicon carbide substrate(201), and a p type impurity is implanted on the p type silicon carbide epitaxial layer at a high temperature to form a p+ type channel stopper(205) for electrically isolating a standard MOSFET device from a sensing MOSFET device. A source and drain(206) configuring the standard MOSFET and the sensing MOSFET is formed on the epitaxial layer. A protective layer(214) is formed on a standard MOSFET device region to prevent contact of hydrogen gas, and a metal resistance type heating layer(215) is formed on a lower portion of the substrate to change a temperature of the MOSFET device.
Abstract:
A semiconductor type hydrogen gas sensor and a manufacturing method thereof are provided to improve a sensitivity for detecting a fault in an insulation oil at an early stage by using a palladium electrode instead of a platinum electrode and inserting an adhesion promoter metal between a substrate and a palladium electrode. A hydrogen gas sensor includes a substrate(101), a junction enhancement metal layer(102), a heater, a catalyst metal layer(103), and a reactive oxide film(104). Device structures are formed on the substrate. The junction enhancement metal layer is bonded with a catalyst metal on the substrate. The heater is formed along a front edge of the substrate. The catalyst metal layer dissociates a hydrogen molecule into hydrogen atoms on the junction enhancement metal layer. The reactive oxide film generates a change of a transition property according to an atomic concentration of hydrogen between the junction enhancement metal layer and the catalyst metal layer.
Abstract:
본발명은, A-B-A-C-A 원소가 5개층으로적층되는단위셀과, 상기단위셀말단의 A 원소와다른단위셀말단의 A 원소는상호간에반데르발스(van der waals) 결합에의해반복적층되는구조를가진 Te 계열전소재에있어서, 상기반복적층되는 A 원소와인접한 A 원소사이에도핑재인침입형 D 원소가침입위치되어상기단위셀의적층결함이발생하며, 상기단위셀과는다른복합결정구조가형성됨과동시에쌍정(twin) 및메탈레이어(metal layer)가형성됨을기술적요지로한다. (여기서 A는 Te 또는 Se 중하나이고, B는 Bi 또는 Sb중하나이고, C는 Bi 또는 Sb중하나이다.) 이에의해단위셀과단위셀사이에침입형도핑재를첨가하여단위셀의적층결함을발생시키고, 이를통해쌍정(twin) 및메탈레이어(metal layer)가형성되는효과를얻을수 있다.