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11.发明专利
公开(公告)号：JP2000338929A
公开(公告)日：2000-12-08
申请号：JP2000112417
申请日：2000-04-13
Applicant: CANON KK
Inventor： KUNO MITSUTOSHI , SAGANO OSAMU , FUJII AKIRA
Abstract: PROBLEM TO BE SOLVED: To memorize history information by detecting the state of discharge or the like in a display panel or by detecting the state relative to the discharge. SOLUTION: In this display panel composed of an airtight vessel having the roughly vacuum state in the inside, in which plural spacers are arranged between an electron source having arranged plural emissive elements and a face plate installed corresponding to the electron source and having a phosphor emitting light by collision of electrons, an anode electrode is installed on the face plate side, and a high voltage is applied on the anode electrode, to accelerate electrons emitted from the electron source in the phosphor direction. A discharge phenomenon generated by application of the high voltage through the spacers, or a current relative to the discharge is detected by a current detecting circuit 12. By forming the anode electrode from plural divided electrodes, a spot where the discharge is generated can be grasped more accurately.
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公开(公告)号：JPH11202828A
公开(公告)日：1999-07-30
申请号：JP906298
申请日：1998-01-20
Applicant: CANON KK
Inventor： SAGANO OSAMU , TODOKORO YASUYUKI , SUZUKI HIDETOSHI
Abstract: PROBLEM TO BE SOLVED: To prevent an overvoltage from being applied to an electron emitting element by securely preventing ringing at the rise time of a modulation signal. SOLUTION: A display panel 112 has an electron source constituted by arranging in matrix cold cathode elements which emit electrodes as many as how long a voltage is applied. An S/P converting circuit 106, a latch circuit 107, and a pulse-width modulating circuit 108 generate modulation signals having time width corresponding to an image signal by the cold cathode elements for one line of cold cathode elements while synchronizing the trailing edges of the modulation signals. A modulation signal delay circuit 109 and a delay control circuit 111 disperses the rise timing of the modulation signals having the same time width among the generated modulation signals within specific time width. Then a modulation signal voltage driving circuit 110 and a scanning signal generating circuit 104 drives the display panel 112 by using the obtained modulation signals.
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公开(公告)号：JPH09134144A
公开(公告)日：1997-05-20
申请号：JP29311995
申请日：1995-11-10
Applicant: CANON KK
Inventor： SAGANO OSAMU , SAKAI KUNIHIRO , SUZUKI HIDETOSHI
Abstract: PROBLEM TO BE SOLVED: To prevent an element from generating ringing at the time of synchronizing with a rising edge of a pulse and being destroyed when a picture signal is pulse-width-modulated and is impressed on a cold cathode. SOLUTION: When a NTSC picture signal is inputted, the signal is digitized by an 8-bit A/D converter, and (m)×(n) picture elements for one line of the panel are stored in a line memory 107. Each picture element value is inputted to 8-bit counter in a modulation signal generator 108. The counter counts up to 255 with the value inputted from the line memory 107 defined as an initial value in synchronism with a signal s1 which divides the horizontal synchronizing signal to (m), and then starts up output signal pulse s7 and keeps it at a high- level until the following signal s1. The modulated signal thus obtained rises up at a timing according to the picture element value and falls is synchronization with each line. Consequently, the generation of ringing can be prevented at rising up and its harmful effect can be prevented.
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公开(公告)号：JP2003195798A
公开(公告)日：2003-07-09
申请号：JP2001390599
申请日：2001-12-21
Applicant: CANON KK
Inventor： SAGANO OSAMU , INAMURA KOHEI , ABE NAOTO , SAITO YUTAKA , IKEDA TAKESHI
Abstract: PROBLEM TO BE SOLVED: To provide a picture display device capable of suitably correcting variation in driving conditions due to electric resistance in the matrix wiring of a display panel by using lesser hardware. SOLUTION: The picture display device is provided with a corrected picture data calculation means 14 for generating the corrected picture data which are picture data provided with correction for relaxing an influence by a voltage drop caused by the electric resistance in the row wiring to the picture data inputted during a single horizontal scanning period, and the corrected picture data calculation means 14 comprises a means for discretely predicting and calculating a voltage drop amount in the spatial and temporal directions to be caused on the row wiring during a single horizontal scanning period corresponding to the input picture data, and a means for calculating the corrected picture data provided with correction to the picture data from the calculated voltage drop amount. Further, a preferred correction can be made also to dispersion in wiring resistance by manufacture and a temperature characteristic by altering the wiring resistance value used for calculating the corrected picture data. COPYRIGHT: (C)2003,JPO
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公开(公告)号：JP2003108062A
公开(公告)日：2003-04-11
申请号：JP2001304608
申请日：2001-09-28
Applicant: CANON KK
Inventor： SAGANO OSAMU , ABE NAOTO , SAITO YUTAKA
Abstract: PROBLEM TO BE SOLVED: To enable suitable correction to be performed. SOLUTION: In constitution having a plurality of display elements which are driven with matrix wirings, pictures for adjustment in which a plurality of correcting conditions are reflected are displayed and suitable conditions are selected. Then, corrected picture data which are adjusted by the selected conditions are obtained.
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Patent Agency Ranking
公开(公告)号：JP2002366080A
公开(公告)日：2002-12-20
申请号：JP2001176930
申请日：2001-06-12
Applicant: CANON KK
Inventor： SAGANO OSAMU
Abstract: PROBLEM TO BE SOLVED: To provide a picture display device capable of displaying a high- quality picture by calculating a correction value with respect to voltage drop with simple constitution and small computational complexity and to provide the method of driving the picture display device. SOLUTION: In this display device, a plurality of column wirings are divided into blocks and a node is set at a boundary position. In a correction value calculating means 14, the voltage drop values of row wiring in respective nodes are calculated on the basis of input picture data, offset voltage values ΔVcmp which are to be applied uniformly to the column wiring of individual blocks are calculated from these voltage drop values, and correction values ΔVkL, ΔVkR in which the difference between the offset voltage values is subtracted from the voltage drop values are calculated. An arithmetic part 12 corrects individual input picture data by interpolating the correction values ΔVkL, ΔVkR with linear approximation. A modulation means 8 applies a modulation signal which is obtained by superimposing the offset voltage supplied from an offset voltage generating means 15 on the potential of the modulation signal generated on the basis of the correction picture data to the individual column wiring.
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17.发明专利
公开(公告)号：JP2002311885A
公开(公告)日：2002-10-25
申请号：JP2001115753
申请日：2001-04-13
Applicant: CANON KK
Inventor： ABE NAOTO , YAMAZAKI TATSURO , SAGANO OSAMU
Abstract: PROBLEM TO BE SOLVED: To provide a highly reliable picture display device capable of reducing deterioration in reproducing gradations caused by the fluctuation of a power source and an element characteristic with a small scale circuit composition, and also realizing excellent reproduction of gradations even in picture signals or the like provided with gamma-correction beforehand. SOLUTION: Based on the brightness data inputted, instead of a part or the whole of the voltage V1 having a predetermined pulse width, the voltage V2 (V1
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公开(公告)号：JP2000250476A
公开(公告)日：2000-09-14
申请号：JP5013199
申请日：1999-02-26
Applicant: CANON KK
Inventor： SAGANO OSAMU
Abstract: PROBLEM TO BE SOLVED: To enhance the response speed of a display device by preventing the reduction of a response speed due to parasitic capacitances. SOLUTION: In an image display device or an electron beam generating display which is provided with a display panel 1 or a multiple electron source having a plurality of display elements or cold cathode elements and row- and column wirings connecting these elements in a matrix, a scanning means 2 supplying selection pulses to the display elements or the cold cathode elements through row wirings, and modulation means 8, 10 supplying modulated pulses to the display elements or the cold cathode elements through column wirings, the modulation means are provided with a current pulse supplying means 10 supplying current pulses as modulated pulses and a charging voltage applying means 30 applying charging voltage for charging parasitic capacitances to row wirings in synchronization with the buildup of the current pulse, and values of voltages to be applied by the means 30 are made different according to positions of the column wirings.
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公开(公告)号：JP2000242247A
公开(公告)日：2000-09-08
申请号：JP4055799
申请日：1999-02-18
Applicant: CANON KK
Inventor： SAGANO OSAMU
Abstract: PROBLEM TO BE SOLVED: To independently display a picture, to constitute a multiscreen display device by mutually coupling plural display devices as well and to easily conduct the coupling and the separating of the devices. SOLUTION: In the picture display device 2016, where a multiscreen display device is constituted by coupling plural picture display devices, receiving sections 2001a to 2001c receive video signals. A connection section 2002 conducts a coupling to other picture display device to constitute the multiscreen display device. A connection judging section 2003 judges whether other picture display device is connected or not at the section 2002 and transmits the judged result to a display control section 2005. If the section 2002 judges that other display device is coupled in the section 2002, the section 2005 controls the portion occupied by the display device in the multiscreen display device so that the portion is magnified and displayed on a display panel 2008.
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公开(公告)号：JP2000098967A
公开(公告)日：2000-04-07
申请号：JP26705998
申请日：1998-09-21
Applicant: CANON KK
Inventor： SAGANO OSAMU , ABE NAOTO
Abstract: PROBLEM TO BE SOLVED: To provide an image display panel driving circuit simplifying a row driving means (circuit) and displaying a high quality image. SOLUTION: In the image display panel driving circuit provided with a row driving circuit driving row wiring of an image display panel provided with a cathode substrate having an electron radiation element connected to the row wiring and column wiring and an anode substrate having a phosphor receiving an electron and light emitting, a column driving circuit driving the column wiring and a high voltage application means applying a high voltage between the cathode substrate and the anode substrate, the row driving circuit is provided with a shift register successively selecting the row wiring based on image information and a row voltage switch circuit switching a voltage applied to the row wiring based on the output of the shift register, and a switching element (FET, P2005) is connected between the output terminal of the row voltage switch circuit and a first power source (-Vss), and a resistor (R1) is connected between the output terminal and a second power source (GND).
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