公开(公告)号：JP2010147354A

公开(公告)日：2010-07-01

申请号：JP2008324905

申请日：2008-12-22

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： SHIODA JUNJI ,  KOMUTSU YASUSUKE ,  FUJII NOBUMITSU ,  KUWABARA OSAMU ,  OKADA OSAMU ,  KIZAKI MASAYASU ,  MASUDA TAKASHI

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To prevent a resin protective film from being easily warped entirely in curing when forming the resin protective film for protecting bottom and side faces of a silicon substrate. SOLUTION: First, a first groove 28 is formed in a semiconductor wafer 21, a sealing film 12, and the like at a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into individual silicon substrates 1 by the formation of the first groove 28. Then, a resin protective film 11 is formed on the bottom face of the respective silicon substrates 1 including the inside of the first groove 28. In this case, although the semiconductor wafer 21 is separated into the individual silicon substrates 1, a first support plate 24 is stuck to an upper surface of a columnar electrode 10 and the sealing film 12 via a first adhesive layer 23, thus preventing an entire part including the individually separated silicon substrates 1 from being warped easily when forming the resin protective film 11. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：为了防止树脂保护膜在形成用于保护硅衬底的底部和侧面的树脂保护膜时在固化中容易翘曲。 解决方案：首先，在切割街道22的半导体晶片21，密封膜12等中形成有第一槽28以及与切割街22的两侧对应的部分。在该状态下， 通过形成第一槽28将半导体晶片21分离为单独的硅基板1.然后，在包括第一槽28的内部的各硅衬底1的底面上形成树脂保护膜11.在这种情况下 虽然将半导体晶片21分离为单独的硅基板1，但是第一支撑板24经由第一粘合层23粘贴在柱状电极10的上表面和密封膜12上，从而防止了包括 单独分离的硅衬底1在形成树脂保护膜11时容易弯曲。版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2010147293A

公开(公告)日：2010-07-01

申请号：JP2008323774

申请日：2008-12-19

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KOMUTSU YASUSUKE ,  OKADA OSAMU ,  KUWABARA OSAMU ,  SHIODA JUNJI ,  FUJII NOBUMITSU

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To prevent a resin protective film from being easily warped entirely in curing when forming the resin protective film for protecting bottom and side faces of a silicon substrate. SOLUTION: First, a groove 28 is formed in a semiconductor wafer 21, a sealing film 12, and the like at a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into individual silicon substrates 1 by the formation of the groove 28. Then, a resin protective film 11 is formed on the bottom face of the respective silicon substrates 1 including the inside of the groove 28. In this case, although the semiconductor wafer 21 is separated into the individual silicon substrates 1, a first support plate 25 is stuck to an upper surface of a columnar electrode 10 and the sealing film 12 via a first adhesive layer 23, or the like thus preventing an entire part including the individually separated silicon substrates 1 from being warped easily when forming the resin protective film 11. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：为了防止树脂保护膜在形成用于保护硅衬底的底部和侧面的树脂保护膜时在固化中容易翘曲。 解决方案：首先，在切割街道22处的半导体晶片21，密封膜12等中形成凹槽28，并且与切割街22的两侧对应的部分形成凹槽28.在该状态下，半导体 通过形成槽28将晶片21分离成单独的硅基板1.然后，在包括槽28的内部的各硅衬底1的底面上形成树脂保护膜11.在这种情况下，虽然 将半导体晶片21分离为单独的硅基板1，第一支撑板25经由第一粘合层23等粘合到柱状电极10的上表面和密封膜12上，从而防止包括 单独分离的硅衬底1在形成树脂保护膜11时容易弯曲。版权所有（C）2010，JPO＆INPIT

公开(公告)号：JPH1012659A

公开(公告)日：1998-01-16

申请号：JP7671697

申请日：1997-03-13

Applicant: CASIO COMPUTER CO LTD

Inventor： YAMAMOTO MICHIHIKO ,  KUWABARA OSAMU

IPC: H01L21/60 ,  H01L21/603 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To provide a connection structure between an IC chip and a wiring board, which can prevent short-circuiting between adjacent solder bumps even when electrodes of the IC ship are very small in their pitch. SOLUTION: A metallic bump 28 of copper provided under an electrode 23 of an IC ship 21 is connected to a solder bump 36 having a high melting point and provided on a connection pad 33 of a wiring substrate 31 via a solder layer 29 having a low melting point. In this case, when the solder layer 29 and the bump 36 are bonded by thermocompression at a temperature at which the layer 29 melts and the bump 36 does not melt, both bumps 28 and 36 can be connected each other while avoiding extension of the solder bump 36 in its transversal direction. As a result, even when a pitch of the electrodes 23 of the chip 21 is an very small as about 150μm, short-circuiting between the adjacent solder bumps 36 can be avoided.

公开(公告)号：JPH08125328A

公开(公告)日：1996-05-17

申请号：JP28457594

申请日：1994-10-26

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU

IPC: H01R4/02 ,  H05K3/32 ,  H05K3/34 ,  H01R9/09

Abstract: PURPOSE: To sufficiently obtain the joint strength. CONSTITUTION: A solder sheet 22 is transferred to the connecting electrode 7 of a printed circuit board 4 by thermally press bonding, the outer lead 5 of a TAB tape 3 is superposed on the electrode 7 of the board 4 via the sheet 22, and thermally press bonded from above the outer lead 5 of the tape 3 by using a thermally press bonding head 12 thereby to connect the electrode 7 of the board 4 to the outer lead 5 of the tape 3 via the sheet 22. In this case, if the sheet 22 is formed in a suitable thickness, the outer lead 5 of the tape 3 can be so formed to sufficiently increase the joint part 9 as to be buried by the joint part 23 with the result that the sufficient connecting strength can be obtained.

公开(公告)号：JPH06124980A

公开(公告)日：1994-05-06

申请号：JP29926692

申请日：1992-10-12

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU

IPC: H01L21/60 ,  H01L21/603

Abstract: PURPOSE:To reduce the number of processes in a flip chip bonding method. CONSTITUTION:A bonding head 11 is constituted of a large pipe 12 and a small pipe 13 which is arranged at the inner center of the pipe 12. Heated gas is jetted from between the large pipe 12 and the small pipe 13. Vacuum suction is performed by the inside of the small pipe 13. An IC chip 1 sucked by the small pipe 13, and a pressure is applied in the vertical direction in the state of horizontal positioning. Thus the chip is subjected to compression bonding on a wiring board 4. Hence the chip 1 is temporarily fixed as it is. Mixed gas of inert gas and gas for reduction is jetted at a high temperature from between the large pipe 12 and the small pipe 13. Thereby solder bumps 3 are melted and the IC chip 1 is immediately thermally compression-bonded on the wiring board 4 after mounting. Further the surface of a connection pad 6 is reduced by the gas for reduction in the mixed gas, and the adhesion to the melted solder bump 3 can be improved.

公开(公告)号：JPH05226502A

公开(公告)日：1993-09-03

申请号：JP5883092

申请日：1992-02-13

Applicant: CASIO COMPUTER CO LTD

Inventor： KUWABARA OSAMU

IPC: H01L21/60 ,  H01L23/12

Abstract: PURPOSE:To avoid the needless runout of solder bump in case of mounting an IC chip. CONSTITUTION:Within the title connection structure, a wiring board 17 is composed of a board main body 11 whereon a wiring pattern 12 is formed, a bump electrode 14 comprising copper is formed on the surface of a connecting part 12a of the wiring pattern 12 while an insulating layer 16 is formed on the specific part of the board main body 11 including the wiring pattern 12. Furthermore, the connecting electrode 19 of an IC chip 18 is connected to the whole surface of the metallic layer 15 of the wiring board 17 by thermocompression bonding through the intermediary of the previously provided solder bump 20 so as to mount the IC chip on the wiring board 17. At this time, the solder bump 2 once melted down during the thermocompression bonding can be prevented from running out of the surface end part of the metallic layer 15 by the surface tention thereby enabling the needless runout of the solder bump 20 to be avoided.

公开(公告)号：JPH01268037A

公开(公告)日：1989-10-25

申请号：JP9544888

申请日：1988-04-20

Applicant: CASIO COMPUTER CO LTD

Inventor： SUZUKI SATOSHI ,  KUWABARA OSAMU ,  MUTO JIRO ,  SHINOZAKI EIICHI

IPC: H01L21/603 ,  H01L21/60

Abstract: PURPOSE:To eliminate the dead space of a resin film in a junction, enable the high-density packaging, and prevent an electrical bad effect of unnecessary resin film, by cutting off the outside of the part where metal lead leaves are stuck inside the opening of the resin film by thermocompression to eliminate together with the resin film on the outer edge of the opening. CONSTITUTION:An opening 4b, which is a gap along one of the edges of a resin film 4, is formed in said resin film 4 with many metal lead leaves 5 connected to the electrodes 6a of an IC chip 6 stuck on the upper surface thereof. The opening 4b is bridged with each metal lead leaf 5 reaching the edge of the resin film 4 and the part of each metal lead leaf 5 at which is exposed through said opening 4b is sunk into said opening 4b by a thermocompression bonding head 10 to bond with the connecting lead 2a of an electronic part board 2 by thermocompression. The outside of the part bonded by thermocompression is cut off and eliminated together with the resin film 4 on the outer edge of the opening 4b. The outer edges 5b2 of the metal lead leaves 5, for example, are covered by silicon rubber 9 with bonded with the connecting lead 2a of the electronic part board 2.

公开(公告)号：JP2010283367A

公开(公告)日：2010-12-16

申请号：JP2010166433

申请日：2010-07-23

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： KOMUTSU YASUSUKE ,  WAKABAYASHI TAKESHI ,  OKADA OSAMU ,  KUWABARA OSAMU ,  SHIODA JUNJI ,  FUJII NOBUMITSU

IPC: H01L21/301 ,  H01L21/304 ,  H01L21/768 ,  H01L23/12 ,  H01L23/522

CPC classification number: H01L24/96 ,  H01L2224/13 ,  H01L2224/94 ,  H01L2924/01019 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/03

Abstract: PROBLEM TO BE SOLVED: To make a low-dielectric constant film hardly separate, in a semiconductor device provided with a low-dielectric constant film wire-layered structure part comprising layered structure of a silicon substrate, the low-dielectric constant film provided on the silicon substrate, and a wire. SOLUTION: The low-dielectric constant film wire-layered structure part 3 comprising the layered structure of the low-dielectric constant film 4 and the wire 5 is provided in an area excepting the periphery part of an upper face of the silicon substrate 1. A circumferential side face of the low-dielectric constant film wire-layered structure part 3 is coated by a sealing film 15. The low-dielectric constant film is formed thereby into a structure hardly separated. An under layer protection film 18 is provided therein, on a lower face of the silicon substrate 1, to protect the lower face from a crack or the like. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题为了使低介电常数膜几乎不分离，在设置有包括硅衬底的层状结构的低介电常数膜线层状结构部分的半导体器件中，低介电常数膜 设置在硅基板上，以及导线。 解决方案：包括低介电常数膜4和线5的层状结构的低介电常数膜线层结构部分3设置在除了硅衬底的上表面的周边部分之外的区域中 低介电常数薄膜线层状结构体3的周向侧面被密封膜15覆盖。低介电常数膜形成为几乎不分离的结构。 在硅基板1的下表面上设置有底层保护膜18，以保护下表面免受裂纹等的影响。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2010147358A

公开(公告)日：2010-07-01

申请号：JP2008324914

申请日：2008-12-22

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： SHIODA JUNJI ,  KOMUTSU YASUSUKE ,  FUJII NOBUMITSU ,  KIZAKI MASAYASU ,  MASUDA TAKASHI ,  KUWABARA OSAMU ,  OKADA OSAMU

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To prevent a resin protective film from being easily warped entirely in curing when forming the resin protective film for protecting bottom and side faces of a silicon substrate. SOLUTION: First, a first groove 27 is formed in a semiconductor wafer 21, a sealing film 12, and the like at a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into individual silicon substrates 1 by the formation of the groove 27. Then, a resin protective film 11 is formed on bottom faces of the respective silicon substrates 1 including the inside of the first groove 27. In this case, although the semiconductor wafer 21 is separated into the individual silicon substrates 1, a support plate 24 is stuck to upper surfaces of a columnar electrode 10 and the sealing film 12 via an adhesive layer 23, thus preventing an entire part including the individually separated silicon substrates 1 from being warped easily when forming the resin protective film 11. COPYRIGHT: (C)2010,JPO&INPIT

公开(公告)号：JP2010147356A

公开(公告)日：2010-07-01

申请号：JP2008324912

申请日：2008-12-22

Applicant: Casio Computer Co Ltd ,  カシオ計算機株式会社

Inventor： SHIODA JUNJI ,  KOMUTSU YASUSUKE ,  FUJII NOBUMITSU ,  KIZAKI MASAYASU ,  MASUDA TAKASHI ,  KUWABARA OSAMU ,  OKADA OSAMU

IPC: H01L23/12

CPC classification number: H01L2224/11

Abstract: PROBLEM TO BE SOLVED: To prevent a resin protective film from being easily warped entirely in curing when forming the resin protective film for protecting bottom and side faces of a silicon substrate. SOLUTION: First, a first groove 27 is formed in a semiconductor wafer 21, a sealing film 12, and the like at a dicing street 22 and parts corresponding to both the sides of the dicing street 22. In this state, the semiconductor wafer 21 is separated into individual silicon substrates 1 by the formation of the groove 27. Then, a resin protective film 11 is formed on bottom faces of the respective silicon substrates 1 including the inside of the first groove 27. In this case, although the semiconductor wafer 21 is separated into the individual silicon substrates 1, a support plate 24 is stuck to upper surfaces of a columnar electrode 10 and the sealing film 12 via an adhesive layer 23, thus preventing an entire part including the individually separated silicon substrates 1 from being warped easily when forming the resin protective film 11. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：为了防止树脂保护膜在形成用于保护硅衬底的底部和侧面的树脂保护膜时在固化中容易翘曲。 解决方案：首先，在切割街道22的半导体晶片21，密封膜12等中形成第一凹槽27，并且与切割街22的两侧相对应的部分形成。在该状态下， 通过形成槽27将半导体晶片21分离成单独的硅基板1.然后，在包括第一凹槽27的内部的各个硅基板1的底面上形成树脂保护膜11.在这种情况下，尽管 将半导体晶片21分离成单独的硅基板1，经由粘合剂层23将支撑板24粘贴在柱状电极10和密封膜12的上表面，从而防止包含单独分离的硅基板1的整个部分 在形成树脂保护膜11时容易弯曲。（C）2010年，JPO＆INPIT