公开(公告)号：US20150221571A1

公开(公告)日：2015-08-06

申请号：US14608537

申请日：2015-01-29

Applicant: CORNING INCORPORATED

Inventor： Satish Chandra Chaparala ,  Scott Christopher Pollard

IPC: H01L23/15 ,  H05K1/18 ,  H05K1/02 ,  H01L23/00

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H05K1/0201 ,  H05K1/181 ,  H05K2201/068 ,  H01L2924/00

Abstract: Methods and apparatus are provide for an interposer for interconnecting one or more semiconductor chips with an organic substrate in a semiconductor package, the interposer including: a first glass substrate having first and second opposing major surfaces, the first glass substrate having a first coefficient of thermal expansion (CTE1); a second glass substrate having first and second opposing major surfaces, the second glass substrate having a second coefficient of thermal expansion (CTE2); and an interface disposed between the first and second glass substrates and joining the second major surface of the first glass substrate to the first major surface of the second glass substrate, where CTE1 is less than CTE2, the first major surface of the first glass substrate operates to engage the one or more semiconductor chips, and the second major surface of the second glass substrate operates to engage the organic substrate.

Abstract translation: 提供了用于将一个或多个半导体芯片与半导体封装中的有机衬底互连的插入件的方法和装置，所述插入器包括：具有第一和第二相对主表面的第一玻璃衬底，所述第一玻璃衬底具有第一热导率 扩展（CTE1）; 具有第一和第二相对主表面的第二玻璃基板，所述第二玻璃基板具有第二热膨胀系数（CTE2）; 以及设置在第一和第二玻璃基板之间并且将第一玻璃基板的第二主表面接合到第二玻璃基板的第一主表面的接口，其中CTE1小于CTE2，第一玻璃基板的第一主表面操作 以接合一个或多个半导体芯片，并且第二玻璃基板的第二主表面操作以接合有机基板。

公开(公告)号：US12207405B2

公开(公告)日：2025-01-21

申请号：US17923624

申请日：2021-04-29

Applicant: CORNING INCORPORATED

Inventor： Dhananjay Joshi ,  Chukwudi Azubuike Okoro ,  Scott Christopher Pollard

IPC: H05K1/11 ,  H05K1/03 ,  H05K3/06 ,  H05K3/42

Abstract: A substrate including a via with a beveled overburden is disclosed. The substrate can include a substrate having a first surface, a second surface opposite the first surface, and a via passing from the first surface to the second surface. The via can be coated with a metallic layer that includes a first beveled overburden on the first surface, and the first beveled overburden can include a first outer edge that forms a first bevel angle greater than 95° with the first surface. The substrate can include a second beveled overburden that includes a second outer edge that forms a second bevel angle greater than 95° with the second surface. Methods of making the beveled overburdens are also disclosed.

公开(公告)号：US20230221278A1

公开(公告)日：2023-07-13

申请号：US18122192

申请日：2023-03-16

Applicant: CORNING INCORPORATED

Inventor： Robert Alan Bellman ,  Jeffrey Stapleton King ,  Scott Christopher Pollard

IPC: G01N27/413 ,  C03C27/10 ,  C03C17/06 ,  C03C23/00 ,  C03C15/00

CPC classification number: G01N27/413 ,  C03C27/10 ,  C03C17/06 ,  C03C23/0025 ,  C03C15/00 ,  C03C2217/254

Abstract: A method of forming a glass electrochemical sensor is described. In some embodiments, the method may include forming a plurality of electrical through glass vias (TGVs) in an electrode substrate; filling each of the plurality of electrical TGVs with an electrode material; forming a plurality of contact TGVs in the electrode substrate; filling each of the plurality of contact TGVs with a conductive material; patterning the conductive material to connect the electrical TGVs with the contact TGVs; forming a cavity in a first glass layer; and bonding a first side of the first glass layer to the electrode substrate.

公开(公告)号：US11201109B2

公开(公告)日：2021-12-14

申请号：US16776663

申请日：2020-01-30

Applicant: CORNING INCORPORATED

Inventor： Mandakini Kanungo ,  Prantik Mazumder ,  Chukwudi Azubuike Okoro ,  Ah-Young Park ,  Scott Christopher Pollard ,  Rajesh Vaddi

IPC: H01L23/15 ,  H01L23/48 ,  H01L23/492 ,  H01L23/498 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  C23C14/18 ,  C23C18/38 ,  C23C28/02 ,  H01L21/768 ,  C03C17/06 ,  C03C3/06 ,  C03C15/00 ,  C03C23/00 ,  H05K3/38 ,  C25D7/12 ,  C03C3/076 ,  H01L21/48 ,  H01L23/00 ,  H05K3/00 ,  H05K3/42

Abstract: According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

公开(公告)号：US11152294B2

公开(公告)日：2021-10-19

申请号：US16376467

申请日：2019-04-05

Applicant: Corning Incorporated

Inventor： Tian Huang ,  Mandakini Kanungo ,  Ekaterina Aleksandrovna Kuksenkova ,  Prantik Mazumder ,  Chad Byron Moore ,  Chukwudi Azubuike Okoro ,  Ah-Young Park ,  Scott Christopher Pollard ,  Rajesh Vaddi

IPC: H01L23/15 ,  H01L23/48 ,  H01L23/492 ,  H01L23/498 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  C03C15/00 ,  C23C18/38 ,  H01L21/768 ,  H05K3/38 ,  C23C14/18 ,  C23C28/02 ,  C03C17/06 ,  C03C3/06 ,  C03C23/00 ,  C03C17/00 ,  H05K3/42 ,  C25D7/12 ,  C03C3/076 ,  H01L21/48 ,  H01L23/00 ,  H05K3/00

Abstract: An article includes a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and at least one via extending through the substrate from the first major surface to the second major surface over an axial length in an axial dimension. The article also includes a metal connector disposed within the via that hermetically seals the via. The article has a helium hermeticity of less than or equal to 1.0×10−8 atm-cc/s after 1000 thermal shock cycles, each of the thermal shock cycle comprises cooling the article to a temperature of −40° C. and heating the article to a temperature of 125° C., and the article has a helium hermeticity of less than or equal to 1.0×10−8 atm-cc/s after 100 hours of HAST at a temperature of 130° C. and a relative humidity of 85%.

公开(公告)号：US20210407896A1

公开(公告)日：2021-12-30

申请号：US17470519

申请日：2021-09-09

Applicant: CORNING INCORPORATED

Inventor： Mandakini Kanungo ,  Prantik Mazumder ,  Chukwudi Azubuike Okoro ,  Ah-Young Park ,  Scott Christopher Pollard ,  Rajesh Vaddi

IPC: H01L23/498 ,  H05K1/02 ,  C23C14/18 ,  C23C18/38 ,  C23C28/02 ,  H05K1/03 ,  H05K1/11 ,  H01L21/768 ,  H01L23/15 ,  C03C17/06 ,  H01L23/48 ,  C03C3/06 ,  C03C15/00 ,  C03C23/00 ,  H05K3/38

Abstract: According to various embodiments described herein, an article comprises a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and a via extending through the substrate from the first major surface to the second major surface over an axial length in an axial direction. The article further comprises a helium hermetic adhesion layer disposed on the interior surface; and a metal connector disposed within the via, wherein the metal connector is adhered to the helium hermetic adhesion layer. The metal connector coats the interior surface of the via along the axial length of the via to define a first cavity from the first major surface to a first cavity length, the metal connector comprising a coating thickness of less than 12 μm at the first major surface. Additionally, the metal connector coats the interior surface of the via along the axial length of the via to define a second cavity from the second major surface to a second cavity length, the metal connector comprising a coating thickness of less than 12 μm at the second major surface and fully fills the via between the first cavity and the second cavity.

公开(公告)号：US20190313524A1

公开(公告)日：2019-10-10

申请号：US16376467

申请日：2019-04-05

Applicant: Corning Incorporated

Inventor： Tian Huang ,  Mandakini Kanungo ,  Ekaterina Kuksenkova ,  Prantik Mazumder ,  Chad Byron Moore ,  Chukwudi Azubuike Okoro ,  Ah-Young Park ,  Scott Christopher Pollard ,  Rajesh Vaddi

IPC: H05K1/02 ,  C23C14/18 ,  C23C18/38 ,  C23C28/02 ,  H05K1/11 ,  H05K1/03

Abstract: An article includes a glass or glass-ceramic substrate having a first major surface and a second major surface opposite the first major surface, and at least one via extending through the substrate from the first major surface to the second major surface over an axial length in an axial dimension. The article also includes a metal connector disposed within the via that hermetically seals the via. The article has a helium hermeticity of less than or equal to 1.0×10−8 atm-cc/s after 1000 thermal shock cycles, each of the thermal shock cycle comprises cooling the article to a temperature of −40° C. and heating the article to a temperature of 125° C., and the article has a helium hermeticity of less than or equal to 1.0×10−8 atm-cc/s after 100 hours of HAST at a temperature of 130° C. and a relative humidity of 85%.

公开(公告)号：US09917045B2

公开(公告)日：2018-03-13

申请号：US15287163

申请日：2016-10-06

Applicant: CORNING INCORPORATED

Inventor： Satish Chandra Chaparala ,  Scott Christopher Pollard

IPC: H01L21/00 ,  H01L23/498 ,  H01L23/15 ,  H01L23/00 ,  H05K1/02 ,  H05K1/18 ,  H01L21/48 ,  H01L25/065

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H05K1/0201 ,  H05K1/181 ,  H05K2201/068 ,  H01L2924/00

Abstract: Methods and apparatus are provide for an interposer for interconnecting one or more semiconductor chips with an organic substrate in a semiconductor package, the interposer including: a first glass substrate having first and second opposing major surfaces, the first glass substrate having a first coefficient of thermal expansion (CTE1); a second glass substrate having first and second opposing major surfaces, the second glass substrate having a second coefficient of thermal expansion (CTE2); and an interface disposed between the first and second glass substrates and joining the second major surface of the first glass substrate to the first major surface of the second glass substrate, where CTE1 is less than CTE2, the first major surface of the first glass substrate operates to engage the one or more semiconductor chips, and the second major surface of the second glass substrate operates to engage the organic substrate.

公开(公告)号：US20170025341A1

公开(公告)日：2017-01-26

申请号：US15287163

申请日：2016-10-06

Applicant: CORNING INCORPORATED

Inventor： Satish Chandra Chaparala ,  Scott Christopher Pollard

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/065

CPC classification number: H01L23/49833 ,  H01L21/4857 ,  H01L23/15 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H05K1/0201 ,  H05K1/181 ,  H05K2201/068 ,  H01L2924/00

Abstract: Methods and apparatus are provide for an interposer for interconnecting one or more semiconductor chips with an organic substrate in a semiconductor package, the interposer including: a first glass substrate having first and second opposing major surfaces, the first glass substrate having a first coefficient of thermal expansion (CTE1); a second glass substrate having first and second opposing major surfaces, the second glass substrate having a second coefficient of thermal expansion (CTE2); and an interface disposed between the first and second glass substrates and joining the second major surface of the first glass substrate to the first major surface of the second glass substrate, where CTE1 is less than CTE2, the first major surface of the first glass substrate operates to engage the one or more semiconductor chips, and the second major surface of the second glass substrate operates to engage the organic substrate.

Abstract translation: 提供了用于将一个或多个半导体芯片与半导体封装中的有机衬底互连的插入件的方法和装置，所述插入器包括：具有第一和第二相对主表面的第一玻璃衬底，所述第一玻璃衬底具有第一热导率 扩展（CTE1）; 具有第一和第二相对主表面的第二玻璃基板，所述第二玻璃基板具有第二热膨胀系数（CTE2）; 以及设置在第一和第二玻璃基板之间并且将第一玻璃基板的第二主表面接合到第二玻璃基板的第一主表面的接口，其中CTE1小于CTE2，第一玻璃基板的第一主表面操作 以接合一个或多个半导体芯片，并且第二玻璃基板的第二主表面操作以接合有机基板。

公开(公告)号：US11664285B2

公开(公告)日：2023-05-30

申请号：US17044713

申请日：2019-04-03

Applicant: CORNING INCORPORATED

Inventor： Jin Su Kim ,  Scott Christopher Pollard

IPC: H01L23/15 ,  H01L21/50 ,  H01L23/36 ,  H01L23/538 ,  H01L23/66 ,  H01L23/00 ,  H05K1/02 ,  H05K1/03

CPC classification number: H01L23/15 ,  H01L21/50 ,  H01L23/36 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/14 ,  H05K1/0206 ,  H05K1/0306

Abstract: An electronic package assembly includes a glass substrate including an upper glass cladding layer, a lower glass cladding layer, a glass core layer coupled to the upper glass cladding layer and the lower glass cladding layer, where the upper glass cladding layer and the lower glass cladding layer have a higher etch rate in an etchant than the glass core layer, a first cavity positioned within one of the upper glass cladding layer or the lower glass cladding layer, and a second cavity positioned within one of the upper glass cladding layer or the lower glass cladding layer, a microprocessor positioned within the first cavity, and a micro-electronic component positioned within the second cavity.