公开(公告)号：WO1993010620A1

公开(公告)日：1993-05-27

申请号：PCT/US1992009968

申请日：1992-11-19

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  LESTER, James, W. ,  WAGNER, Randall, W. ,  CALLAWAY, Randy, A.

IPC: H04M11/00

CPC classification number: H04M11/02

Abstract: A circuit for interfacing a host telephone system having a trunk line pair (20) with a central office line pair (30) and an additional circuit line pair (32) includes a loop current monitor circuit (12) for monitoring the host telephone system trunk line pair which is normally connected to the central office line pair. The loop current monitor provides a status signal output indicating the presence or absence of loop current. A relay controller (14) receives the status signal and provides a relay control signal and a hold signal. A relay (22) selectively connects the host telephone system trunk line pair to the additional circuit line pair in response to the relay control signal when loop current is detected after the host telephone goes off-hook. A hold termination circuit receives the hold signal and traps any loop current signals which may be detectable over the central office line pair. The relay controller circuit is active to generate the relay control signal only for an initial time period after the host telephone system goes off-hook.

Abstract translation: 用于将具有中心线对（20）的中继线对（20）和附加电路线对（32）的主机电话系统连接的电路包括用于监控主电话系统中继线（20）的环路电流监视电路（12） 线对通常连接到中心局线对。 环路电流监视器提供指示环路电流存在或不存在的状态信号输出。 继电器控制器（14）接收状态信号并提供继电器控制信号和保持信号。 当在主机摘机后检测到环路电流时，继电器（22）响应于继电器控制信号选择性地连接主电话系统中继线对与附加电路线对。 保持终端电路接收保持信号并捕获可能在中心局线路对上检测的任何环路电流信号。 继电器控制器电路仅在主机电话系统摘机之后的初始时间周期内才能产生继电器控制信号。

公开(公告)号：WO1993010597A2

公开(公告)日：1993-05-27

申请号：PCT/US1992009883

申请日：1992-11-16

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  WHITNEY, Donald, Karl

IPC: H03K0

CPC classification number: H03K17/667

Abstract: A high speed voltage switching circuit possessing immunity to the application of a reverse voltage across its input terminals comprises symmetrically arranged voltage relay transistor circuits respectively coupled between first and second voltage input terminals and a switched voltage output terminal. The first voltage relay transistor circuit is operative to relay a first voltage applied to the first input terminal to the output terminal in response to the controlled application of current directly to the output terminal from a first switched current source. Similarly, the second voltage relay transistor circuit is operative to relay a second voltage applied to the second input terminal directly to the output terminal in response to the removal of current from the output terminal by way of a second switched current source. Each voltage relay transistor circuit preferably comprises two pairs of complementary polarity bipolar transistors having their base-emitter junctions coupled in series between the first voltage input terminal and the output terminal, so that there is substantially no net voltage drop between a voltage input terminal and the output terminal. In order to prevent an inadvertent reverse application of the high and low voltages to the voltage input terminals of the switching circuit, a reverse voltage protection circuit is coupled between the first and second voltage relay transistor circuits and is operative to limit current flow through the voltage relay transistor circuits.

Abstract translation: 快速开关电路电压，对其输入端子上施加反向电压不敏感。 该电路包括分别耦合在第一和第二电压输入端子和开关电压输出端子之间的对称布置的电压继电器晶体管电路。 第一电压继电器晶体管电路用于响应于通过第一电源将调节后的电流直接施加到输出端子而将施加到第一输入端子的第一电压中继到输出端子。 切换。 类似地，响应于使用输出端的电流抑制，第二电压继电器晶体管电路用于直接向输出端中继施加到第二输入端的第二电压 第二开关电流源。 每个电压继电器晶体管电路最好包括两对互补极性的双极晶体管，其基极 - 发射极结在第一电压输入端和输出端之间串联连接，这样 电压输入端和输出端之间基本上没有电压降。 为了防止在向开关电路的电压输入端施加高电压和低电压时的意外反转，反向开关保护电路被耦合在第一和第二继电器晶体管电路之间。 电压，并且用于限制通过所述电压继电器晶体管电路的电流的流动。

公开(公告)号：WO1992019063A1

公开(公告)日：1992-10-29

申请号：PCT/US1992003163

申请日：1992-04-17

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  DAYNER, David ,  LACKER, Ginny ,  HIRSOHN, Paul ,  BELL, Karen ,  PAFFENROTH, Darryl ,  JACKSON, Allen ,  HOCHMAN, David

IPC: H04M03/42

CPC classification number: H04M3/56

Abstract: A method for combining signals for a telephone conference may include a multiplicity of identical adders (10, 20) for combining six signals and providing a single combined output. The adders (10) may be arranged in a repeatable hierarchical scheme in which each group of six conference members includes an adder (20) for combining all six signals, with the output of this adder being provided to other groups of six so that each conference member receives signals from every other conference member. As few as three hierarchical levels of addition may be used with up to 216 members. Adders (10) may also be arranged so that a member (30) of a first conference may monitor other conferences without affecting the first conference.

公开(公告)号：WO1992008338A1

公开(公告)日：1992-05-14

申请号：PCT/US1991008019

申请日：1991-10-29

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  SALATINO, Matthew, M.

IPC: H05K07/20

CPC classification number: H05K7/20509 ,  H01L2924/1627 ,  H05K1/0393 ,  H05K1/05 ,  H05K1/182 ,  H05K1/189 ,  H05K3/0058 ,  H05K3/3421 ,  H05K7/023 ,  H05K2201/042 ,  H05K2201/052 ,  H05K2201/055 ,  H05K2201/09063 ,  H05K2201/10015 ,  H05K2201/10651 ,  H05K2201/10689 ,  H05K2201/2009

Abstract: A stacked packaging assembly for a plurality of integrated circuit devices (76) employs a web (61) of flexible interconnect material folded into a 'layered' arrangement of parallel web fingers (61) onto which a plurality of integrated circuit devices (76) are surface-mounted. The leads (71, 73) of the integrated circuit devices (76) are attached to interconnect links (81, 83) of the flexible interconnect web (61). A plurality of heat sink plates (115) are interleaved with the folded web fingers (61) of the stack, as so to engage the integrated circuit devices (76) mounted on the web fingers (61). The heat sink plates (115) are retained by thermally conductive spacer blocks (131, 133) along their edges. The spacer blocks (131, 133) are clamped together in a compact laminate structure, so as to form a rigid support which relieves mechanical stresses at the folds of the web fingers (61).

公开(公告)号：WO1992002958A1

公开(公告)日：1992-02-20

申请号：PCT/US1991005581

申请日：1991-08-06

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  BEASOM, James, D.

IPC: H01L27/12

CPC classification number: H01L23/53271 ,  H01L23/50 ,  H01L23/5221 ,  H01L23/535 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The trench pattern (11) of a dielectrically isolated island architecture (14) is filled with doped polysilicon and used as an interconnect structure for circuit devices that are supported within the islands, thereby decreasing the amount of topside interconnect (61) and reducing the potential for parasitics beneath tracks of surface metal. Manufacture of the conductor-filled trench structure may be facilitated by depositing polysilicon over a dielectrically coated trench grid structure and then planarizing the polysilicon to the surface of the oxide dielectric. The exposed polysilicon is doped and then oxidized to seal the dopant, which forms a thin oxide layer on the poly. The oxide dielectric for the trench can then be selectively patterned to form a mask to be for the initial doping of the islands.

公开(公告)号：WO1991020125A1

公开(公告)日：1991-12-26

申请号：PCT/US1991004341

申请日：1991-06-18

Applicant: HARRIS CORPORATION ,  JOST, Steven, R.

Inventor： HARRIS CORPORATION

IPC: H03F03/26

CPC classification number: H03F1/307 ,  H03F3/3076

Abstract: A buffer amplifier configuration simultaneously reduces d.c. voltage offsets through the signal flow path between its input (20) and output (50) and maintains a high input impedance and a low output impedance. In a preferred embodiment, high impedence is achieved by coupling the input transistor (201) collector (204) to a high impedance current source (210), which is coupled to one of the buffer's power supply rails (22). The emitter (206) of the input transistor (201) is coupled to the input terminal (20) and its base (202) to the base (212) of a like polarity bipolar output transistor (211), the emitter (216) of which is coupled to an output terminal (50) and the collector (214) of which is coupled to one supply rail (22). Since both the input and output transistors are of the same polarity type (so that they can be reasonably well matched during manufacture) and have their base-emitter junctions connected back-to-back between the input and output terminals, they impart effectively no Vbe-based d.c. offset voltage through the buffer. To ensure a high input impedance regardless of output load and output stage gain an isolating emitter-follower transistor stage (221) is preferably coupled between the collector (204) of the input transistor stage (201) and the base (212) of the output transistor stage (211).

Abstract translation: 缓冲放大器配置同时减少直流 通过其输入（20）和输出（50）之间的信号流路径的电压偏移，并保持高输入阻抗和低输出阻抗。 在优选实施例中，通过将输入晶体管（201）集电极（204）耦合到耦合到缓冲器的电源轨（22）之一的高阻抗电流源（210）来实现高阻抗。 输入晶体管（201）的发射极（206）与输入端（20）及其基极（202）耦合到类似极性双极性输出晶体管（211）的基极（212），发射极（216） 其耦合到输出端子（50）并且其集电器（214）耦合到一个电源轨（22）。 由于输入和输出晶体管都具有相同的极性类型（使得它们在制造期间可以相当好地匹配），并且它们的基极 - 发射极结在输入和输出端子之间背靠背连接，所以它们无效地赋予Vbe 基于直流 通过缓冲器补偿电压。 为了确保高输入阻抗，无论输出负载和输出级增益如何，隔离射极跟随器晶体管级（221）优选地耦合在输入晶体管级（201）的集电极（204）和输出的基极（212）之间 晶体管级（211）。

公开(公告)号：WO1990001440A1

公开(公告)日：1990-02-22

申请号：PCT/US1989003320

申请日：1989-08-02

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  DENO, Milton, C. ,  SMITH, Eugene, A. ,  DALARUELLE, Dale, H.

IPC: B60T15/22

CPC classification number: B60T13/406 ,  B60T17/228

Abstract: An adaptive brake control system monitors a plurality of brake pipe/air line parameters, such as fluid path volume and air flow rate, and controllably modifies action taken by the engineman or performs emergency control of the brakes, in order to continuously enable the braking system to adapt itself to dynamic operating conditions and anomalies in the integrity of the fluid path. In accordance with a pressure reduction modification mechanism, the application of a pressure reduction to the equalizing reservoir (105) is precisely controlled by taking into account the actual state of the brake pipe (101), so as to ensure that the requested brake application is effected as intended. The control mechanism also monitors the integrity of the fluid flow path of the brake pipe (101)/train air line (201), so that the engineman may be alerted and a prescribed train safety measure may be effected in the event of a potentially hazardous anomally in the link. It also provides the engineman with a precise indication that the brakes (233) of the train have been fully released or applied.

公开(公告)号：WO1988002200A1

公开(公告)日：1988-03-24

申请号：PCT/US1987002330

申请日：1987-09-15

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  MCGANN, William, E.

IPC: H04B07/185

CPC classification number: H04B7/18513 ,  H04B7/18543

Abstract: Operation of a solid state power amplifier (SSPA) (30) in a very small aperture terminal is controlled by a digitally controlled preemphasis attenuation operator upstream of the input of the SSPA. The attenuation operator contains a temperature compensation section (42) that produces an output control voltage which is complementary to the gain-versus-temperature characteristic of the SSPA. This control voltage is scaled and applied as one input to a analog-to-digital converter (41), the output of which drives a digitally controlled (PIN) attenuator (34) at an input to the SSPA-containing up-converter circuit. A second input to the attenuator is derived from the earth station's monitors and control processor (61) which monitors the operating frequency and accesses an associated look-up table containing a characteristic representative of the variation in the power output of the SSPA versus change in frequency.

Abstract translation: 在非常小的孔径端子中的固态功率放大器（SSPA）（30）的操作由在SSPA的输入端上游的数字控制的预加重衰减算子来控制。 衰减算子包含温度补偿部分（42），其产生与SSPA的增益 - 温度特性互补的输出控制电压。 该控制电压被缩放并作为模拟数字转换器（41）的一个输入端被施加，模数转换器（41）的输出在包含SSPA的上变频器电路的输入处驱动数字控制（PIN）衰减器（34）。 来自衰减器的第二输入源自地球站的监视器和控制处理器（61），监视器和控制处理器（61）监视工作频率并访问包含代表SSPA的功率输出变化的特性与频率变化相关联的查找表 。

公开(公告)号：WO1987003441A1

公开(公告)日：1987-06-04

申请号：PCT/US1986002561

申请日：1986-11-26

Applicant: TANDEM COMPUTERS INCORPORATED ,  HARRIS CORPORATION

Inventor： TANDEM COMPUTERS INCORPORATED ,  HARRIS CORPORATION ,  BUSTAMANTE, Herman, A. ,  LEMON, John, A. ,  STAPOR, Harry, J.

IPC: H04B07/185

CPC classification number: H04B7/18513

Abstract: A system (20, 22) for compensating for varying attenuation of an uplink signal from a local node to a satellite. The system (20, 22) monitors two beacon signals and the local downlink signal to determine fade. An error signal, indicating the uplink fade, is generated and utilized to adjust the gain of the uplink transmitter (42) to compensate for the fade.

Abstract translation: 一种用于补偿从本地节点到卫星的上行链路信号变化衰减的系统（20,22）。 系统（20,22）监视两个信标信号和本地下行链路信号以确定衰落。 产生指示上行衰落的误差信号，并用于调整上行链路发射机（42）的增益以补偿衰落。

公开(公告)号：WO1986006881A1

公开(公告)日：1986-11-20

申请号：PCT/US1986000929

申请日：1986-05-01

Applicant: HARRIS CORPORATION

Inventor： HARRIS CORPORATION ,  TODD, John, R.

IPC: H01Q15/08

CPC classification number: H01Q15/08

Abstract: A dielectric antenna lens (10) for planar wavefront/focal point conversion is configured of a series of concentric rings, each of which is contoured from a rear face (7) to inclined termination edges (15) that are delimited by the functional performance of the lens and which assist in the manufacture of the lens. In addition, the bottom edge of each ring, rather than terminate at a cylindrical side wall of an adjacent ring, terminates at a flattened region (25) between itself and the adjacent ring. This flattened region effectively eliminates the acute angle wedge between rings and, together with the inclined termination edges of the rings, serves to enable the lens to be easily manufactured, as by injection molding (39), with the flattened land portions and inclined termination edges making possible removal of the lens from the injection mold. As a further aspect of the present invention there is provided a multiple wavelength conversion arrangement employing the dielectric lens (10) in combination with a wavelength selective (e.g. dichroic) filter (41), enabling the lens to be used as part of a compact microwave transceiver unit (51, 55) operating at a plurality of different frequencies.