公开(公告)号：CA2515456A1

公开(公告)日：2004-09-23

申请号：CA2515456

申请日：2004-03-03

Applicant: IBM

Inventor： ARMSTRONG WILLIAM JOSEPH ,  ARMSTRONG TROY DAVID ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

IPC: G06F20060101 ,  G06F9/00 ,  G06F9/445 ,  G06F9/46 ,  G06F9/50 ,  G06F12/00

Abstract: A resource and partition manager includes a power on/power off mechanism that is used to assure a hardware resource is powered down when control of the resource is removed from a logical partition, and to assure the hardware resource is powered up when control of the hardware resource is transferred to a logical partition. In the alternative, the resource and partition manager may simply place the hardware resource in a power on reset state when the hardware resource is transferred to a logical partition. In this manner, when made available to a partition, the hardware resource is in a power-on reset state, which is the state typically expected by the logical partition.

公开(公告)号：CA2518468A1

公开(公告)日：2004-11-04

申请号：CA2518468

申请日：2004-04-14

Applicant: IBM

Inventor： KALLA RONALD NICK ,  LEITNER LARRY SCOTT ,  FLOYD MICHAEL STEPHEN ,  ARMSTRONG WILLIAM JOSEPH ,  SINHAROY BALARAM

IPC: G06F9/38 ,  G06F11/34

Abstract: An accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor provides a mechanism for accounting for processor resource usage by programs and thread s within programs. Relative resource use is determined by detecting instructio n dispatches for multiple threads active within the processor, which may inclu de idle threads that are still occupying processor resources. If instructions a re dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in a dispatch state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is dispatching, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching (in processors supporting more than two threads), the processor cycle is billed evenly acro ss the dispatching threads. Multiple dispatches may be detected for the threads and a fractional resource usage determined for each thread and the counters may be updated in accordance with their fractional usage.

公开(公告)号：AU2002328960A1

公开(公告)日：2003-03-10

申请号：AU2002328960

申请日：2002-07-24

Applicant: IBM

Inventor： FRANCOIS CHRIS ,  NAYAR NARESH ,  ARMSTRONG WILLIAM JOSEPH

IPC: G06F9/46 ,  G06F9/00 ,  G06F9/44 ,  G06F9/48 ,  G06F9/50 ,  G06F15/00

Abstract: An apparatus and program product for coordinating the distribution of CPUs as among logically-partitioned virtual processors. A virtual processor may yield a CPU to precipitate an occurrence upon which its own execution may be predicated. As such, program code may dispatch the surrendered CPU to a designated virtual processor.

公开(公告)号：CA2365876A1

公开(公告)日：2000-11-23

申请号：CA2365876

申请日：2000-03-02

Applicant: IBM

Inventor： NAYAR NARESH ,  ARMSTRONG WILLIAM JOSEPH

IPC: G06F9/00 ,  G06F9/46 ,  G06F9/50 ,  G06F9/54 ,  G06F13/00 ,  G06F15/16 ,  G06F15/167 ,  G06F9/40

Abstract: An apparatus, program product and method utilize an event-driven communications interface to support communications between multiple logical partitions (40, 42, and 44) in a logically-partitioned computer. The event- driven communications interface is at least partially disposed within a partition manager (46) that is accessible to each of the logical partitions (40, 42, and 44). Events are typically passed between logical partitions (40 , 42, and 44) in the form of messages that are passed first from a source logical partition that initiates the event, through the partition manager (46), and then to a target logical partition to which the event is directed, while maintaining the independent address spaces associated with the logical partitions (40, 42, and 44).

公开(公告)号：CA2518468C

公开(公告)日：2008-09-30

申请号：CA2518468

申请日：2004-04-14

Applicant: IBM

Inventor： KALLA RONALD NICK ,  LEITNER LARRY SCOTT ,  FLOYD MICHAEL STEPHEN ,  ARMSTRONG WILLIAM JOSEPH ,  SINHAROY BALARAM

IPC: G06F11/34 ,  G06F9/38

Abstract: An accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor provides a mechanism for accounting for processor resource usage by programs and thread s within programs. Relative resource use is determined by detecting instructio n dispatches for multiple threads active within the processor, which may inclu de idle threads that are still occupying processor resources. If instructions a re dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in a dispatch state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is dispatching, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching (in processors supporting more than two threads), the processor cycle is billed evenly acro ss the dispatching threads. Multiple dispatches may be detected for the threads and a fractional resource usage determined for each thread and the counters may be updated in accordance with their fractional usage.

公开(公告)号：DE602004006858T2

公开(公告)日：2008-02-14

申请号：DE602004006858

申请日：2004-04-14

Applicant: IBM

Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

IPC: G06F11/34 ,  G06F9/38

Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

公开(公告)号：CA2515450A1

公开(公告)日：2004-09-23

申请号：CA2515450

申请日：2004-03-03

Applicant: IBM

Inventor： EIDE CURTIS SHANNON ,  ARMSTRONG WILLIAM JOSEPH ,  ARMSTRONG TROY DAVID ,  NORDSTROM GREGORY MICHAEL

IPC: G06F20060101 ,  G06F1/26 ,  G06F9/46 ,  G06F9/50 ,  G06F12/00 ,  G06F13/00

Abstract: A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual I/O slots. The resource and partition manager uses the lock mechanism to obtain a lock on an I/O slot when transferring control of the I/O slot to a logical partition that is powering on and when removing the I/O slot from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of an I/O slot from, or return control to, an operating logical partition in order to facilitate hardware service operations on that I/O slot or on the physical enclosure in which it is contained.

公开(公告)号：CA2515450C

公开(公告)日：2010-04-13

申请号：CA2515450

申请日：2004-03-03

Applicant: IBM

Inventor： ARMSTRONG TROY DAVID ,  ARMSTRONG WILLIAM JOSEPH ,  EIDE CURTIS SHANNON ,  NORDSTROM GREGORY MICHAEL

IPC: G06F9/46 ,  G06F20060101 ,  G06F1/26 ,  G06F9/50 ,  G06F12/00 ,  G06F13/00

Abstract: A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual hardware resources. The resource and partition manager uses the lock mechanism to obtain a lock on a hardware resource when transferring control of the hardware resource to a logical partition that is powering on and when removing the hardware resource from a logical partition that is powering off. The resource and partition manager uses the lock mechanism to remove control of a hardware resource from, or return control to, an operating logical partition in order to facilitate hardware service operations on that hardware resource or on the physical enclosure in which it is contained. The preferred embodiments also include methods for releasing system resources and address bindings allocated to a hardware resource when control the hardware resource is removed from a logical partition.

公开(公告)号：DE602004006858D1

公开(公告)日：2007-07-19

申请号：DE602004006858

申请日：2004-04-14

Applicant: IBM

Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

IPC: G06F11/34 ,  G06F9/38

Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

公开(公告)号：BRPI0409710A

公开(公告)日：2006-05-02

申请号：BRPI0409710

申请日：2004-04-14

Applicant: IBM

Inventor： ARMSTRONG WILLIAM JOSEPH ,  FLOYD MICHAEL STEPHEN ,  LEITNER LARRY SCOTT ,  KALLA RONALD NICK ,  SINHAROY BALARAM

IPC: G06F9/38 ,  G06F11/34

Abstract: Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.