11.
    发明专利
    未知

    公开(公告)号:DE2657484A1

    公开(公告)日:1977-08-04

    申请号:DE2657484

    申请日:1976-12-18

    Applicant: IBM

    Abstract: A charge electrode array for use in an ink jet printing apparatus is formed by anisotropic etching of apertures through a single crystal silicon substrate of (110) orientation. Conductive diffusion layers in the walls of and adjacent to the apertures permit a charge to be placed on a jet stream passing through the apertures. Contacts can be formed on the adjacent diffusion layers to provide connection to an externally located charging circuit or the contacts may be omitted when the charging circuit is formed in the substrate itself and connected by diffusion or a metal layer to each adjacent diffusion layer. Jet nozzles and synchronization electrodes are shown incorporated in the charge electrode array to form a monolithic structure capable of performing a plurality of functions. Substrate contacts are also provided for biasing.

    13.
    发明专利
    未知

    公开(公告)号:FR2298436A1

    公开(公告)日:1976-08-20

    申请号:FR7539614

    申请日:1975-12-17

    Applicant: IBM

    Abstract: In an ink jet printing system, a single nozzle or an array of nozzles are etched in a semiconductor material such as silicon. Each nozzle has polygonal or N-sided entrance and exit apertures of different cross-sectional area. Preferably, the nozzle is in the shape of a truncated pyramid with the entrance and exit apertures being substantially square in cross-section. The corners of the apertures and wall interfaces may be rounded to reduce stress concentrations.

    METHOD FOR FABRICATING TRANSISTOR STRUCTURES HAVING VERY SHORT EFFECTIVE CHANNELS

    公开(公告)号:CA1115855A

    公开(公告)日:1982-01-05

    申请号:CA325550

    申请日:1979-04-11

    Applicant: IBM

    Abstract: A method, including a sequence of process steps, for fabricating insulated gate field effect transistors having very short effective channel lengths. In a first version of the method, the source and drain regions of the device are opened in one process stop and self-alignment of the source and the drain to the gate is achieved in one masking step. The drain region is then masked and the source side of the channel is implanted to adjust the threshold voltage of the high threshold voltage channel region. In a second version of the method, the source region is opened and self-aligned with the gate prior to the opening of drain region. Implantation to adjust the threshold voltage of the high threshold voltage channel region takes place before the drain region is opened, and then the drain region is opened and self-aligned with the gate in a further masking step. In either version, the threshold voltage is adjustable and the channel length is controlled to be a small value. Y0977-057

    JET NOZZLE STRUCTURE FOR ELECTROHYDRODYNAMIC DROPLET FORMATION AND INK JET PRINTING EM THEREWITH

    公开(公告)号:CA1037541A

    公开(公告)日:1978-08-29

    申请号:CA242603

    申请日:1975-12-24

    Applicant: IBM

    Abstract: JET NOZZLE STRUCTURE FOR ELECTROHYDRODYNAMIC DROPLET FORMATION AND INK JET PRINTING SYSTEM THEREWITH The practice of this disclosure obtains a monolithic structure useful for electrohydrodynamically synchronizing the formation of droplets in a jet stream exiting from a jet nozzle. The monolithic structure is primarily adaptable for ink jet printing. The jet nozzle structure provided by the practice of this disclosure includes a jet nozzle design in a crystalline semiconductor block, e.g., of silicon (Si), germanium (Ge) or gallium arsenide (GaAs), with an electrode structure which is integrally incorporated therewith whereby a variable electric field is established proximate to the orifice of the jet nozzle structure. The electric field electrohydrodynamically perturbs the jet stream emitting from the jet nozzle structure so that formation of drops in the jet stream is controllably achieved, e.g. synchronously when the variable electric field is oscillating with a given periodicity. In an exemplary practice of this disclosure, a conductive region is integrally incorporated with a jet nozzle design formed from a block or wafer or substrate of single crystalline silicon either in or on said nozzle whereby a varying electric field is established proximate to the orifice such that the jet stream is temporally and spatially influenced electrohydrodynamically by said electric field. For a particular design of the conductive region, a doped Si region in the Si substrate is utilized therefor. In the fabrication of a particular type of jet nozzle design, which utilizes a block of single crystalline silicon during the fabrication of the jet nozzle, there is included a diffused p+ region and an insulation layer which is formed either unitary therewith, e.g., by oxidation, or is formed ancillary thereto by deposition of an insulation layer. When a synchronizing signal is applied to said p+ silicon layer, an oscillating electric field is established proximate to the orifice of the jet nozzle. There is achieved by the practice of this disclosure a monolithic device for ink jet printing with a plurality of jets which are controllable either independently or cooperatively through appropriate integrated silicon semi-conductor circuitry.

    20.
    发明专利
    未知

    公开(公告)号:FR2296504A1

    公开(公告)日:1976-07-30

    申请号:FR7536645

    申请日:1975-11-21

    Applicant: IBM

    Inventor: BASSOUS ERNEST

    Abstract: Method for producing a predetermined pattern of small size fluid nozzles of identical or different geometries in crystallographically oriented monocrystalline silicon or similar material utilizing anisotropic etching through the silicon to an integral etch resistant barrier layer heavily doped with P type impurities.

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