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    11.
    发明专利
    未知

    公开(公告)号：ES2171161T3

    公开(公告)日：2002-09-01

    申请号：ES93301037

    申请日：1993-02-12

    Applicant: IBM

    Inventor： BARTOW NIEL GEORGE ,  BROWN PAUL JOSEPH ,  CAPOWSKI ROBERT STANLEY ,  FASANO LOUIS THOMAS ,  CREGG THOMAS ANTHONY ,  SALYER GREGORY

    IPC: G06F13/12 ,  G06F13/00 ,  G06F13/38 ,  H04L69/40

    Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

    12.
    发明专利
    未知

    公开(公告)号：DE69331449D1

    公开(公告)日：2002-02-21

    申请号：DE69331449

    申请日：1993-02-12

    Applicant: IBM

    Inventor： BARTOW NIEL GEORGE ,  BROWN PAUL JOSEPH ,  CAPOWSKI ROBERT STANLEY ,  FASANO LOUIS THOMAS ,  CREGG THOMAS ANTHONY ,  SALYER GREGORY ,  WESTCOTT DOUGLAS WAYNE

    IPC: G06F13/12 ,  G06F13/00 ,  G06F13/38 ,  H04L69/40

    Abstract: Buffers 54,58 are provided in two elements 52,56 between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being cancelled.

    13.
    发明专利
    未知

    公开(公告)号：DE2828741A1

    公开(公告)日：1979-01-25

    申请号：DE2828741

    申请日：1978-06-30

    Applicant: IBM

    Inventor： CAPOWSKI ROBERT STANLEY ,  KRYGOWSKI MATTHEW ANTHONY ,  ZIMMERMANN TERRENCE KEITH

    IPC: G06F13/28 ,  G06F12/04 ,  G06F13/12 ,  G06F13/18 ,  G06F9/18 ,  G06F3/00 ,  G11C9/00

    Abstract: Storage access requests are forwarded from plural input/output channels to shared main storage. An address word in each request designates the identity of the source channel (CHID) and "destination" address (of a doubleword space in storage relative to which one, two or four "data" words shall be transferred). EOT tag signal provides demarcation of requests and also uniquely identifies "1-wide" input (Store) requests. Quadword (QW) tag, presented with "4-wide" requests, enables the storage access system to use a single address in the request to locate two contiguous doubleword spaces in storage. Data tags (D1, D2), presented on a selective basis enable the access system to selectively steer (reorder the positions of) data words in an input request relative to word halves of the addressed space. Consequently the data repositioning function associated with Read Backward operations does not require reordering of data words in the channel buffers (saving handling time and expense of "steering" circuits in the individual channels). In association with a "1-wide" input request a single data tag, D1 or D2, is used to steer the single data word of the request into either half of the addressed space on a selective basis.

    14.
    发明专利
    未知

    公开(公告)号：DE2809602A1

    公开(公告)日：1978-10-05

    申请号：DE2809602

    申请日：1978-03-06

    Applicant: IBM

    Inventor： CAPOWSKI ROBERT STANLEY ,  WRIGHT LEWIS WARREN ,  ZIMMERMANN TERRENCE KEITH

    IPC: G06F5/00 ,  G06F13/12 ,  G06F15/02 ,  G06F15/78 ,  G06F3/04 ,  G06F13/06 ,  G06F9/00

    Abstract: The Channel Bus Controller (CBC) transfers information between groups of input/output channels and processor storage. Storage receives or dispenses two data words per access operation. Interfaces for transfers from the channel groups to the CBC are advantageously one word wide; since each output (fetch) request consists of a single request word. Information sent by each group is assembled into three-word units (a request word and zero, one or two data words) in a respective channel bus assembly register (CBAR). The assembled unit is passed from the CBAR to a respective area of an In Buffer array and from that array to storage. Zero filler words are inserted into unused data word positions. A channel request may be tagged to designate a transfer of four data words. If the transfer is an input the four data words are sent to the CBC with a single request word. The third and fourth data words are written in the CBAR over the first and second data words as (or after) the unit formed by the request and first and second data words is advanced to the In Buffer. The same request and the third and fourth data words are transferred as a second unit from the CBAR to the In Buffer. The low order bit in the address part of the request is inverted by the CBC to designate the "next" storage address. This saves time by eliminating a request unit transfer from the source channel group. Request transfers from a group are permitted when a vacancy exists either in the respective CBAR or in a respective area of the In Buffer. Outputs from storage (acknowledgments of data inputs and fetched/output data) are returned to the respective channel group via a respective area of an Out Buffer array. Returns to a group are ordered in the input sequence of respective requests to the CBC although the requests may be applied to storage in another sequence. Tags generated by the CBC are used to maintain the correct output order without delaying evacuation of the In Buffer. The area partitioning of the in and out buffer arrays provides balanced group access to storage and simplifies handling of group traffic. Channel identity information in the request words is looped through the buffer arrays and returned to the channel groups with respective outputs. This permits the CBC (and storage) to ignore channel origins of group traffic and thereby further simplifies handling of traffic.

    15.
    发明专利
    未知

    公开(公告)号：AT185222T

    公开(公告)日：1999-10-15

    申请号：AT93100833

    申请日：1993-01-21

    Applicant: IBM

    Inventor： BARTOW NEIL GEORGE ,  BROWN PAUL JOSEPH ,  CAPOWSKI ROBERT STANLEY ,  FASANO LOUIS THOMAS ,  GREGG THOMAS ANTHONY ,  SALYER GREGORY ,  SUGRUE PATRICK JOHN ,  WESTCOTT DOUGLAS WAYNE ,  ZEYAK VINCENT PAUL JR

    IPC: H04J3/06 ,  H04L25/02 ,  H04L69/40 ,  H04B1/76 ,  H04L1/16

    Abstract: A system and method for asynchronously transmitting data blocks, in parallel, across multiple fibers in a serial manner. Frame groups are provided as a mechanism to transmit associated data serially on each fiber and tie the data being transmitted together. The frame groups do not have sequence numbers, therefore, the receiver determines which frames are part of a frame group by the arrival times of the individual frames. In one embodiment, the transceivers for each member of the parallel bus asynchronously achieve synchronism at each end of the fiber. Thus the need for a common clock is eliminated. The receivers on each side of the bus determine the relative skew for each conductor by performing skew measurements on a calibration message generated by the transmitters on the other side of the bus. When the skew on all conductors, viewed from both sides of the bus, has been determined, the skew values are exchanged across the bus, thus enabling the transmitters to set proper frame spacing.

    HIGH PERFORMANCE CHANNELS FOR DATA PROCESSING SYSTEMS BUS
    16.
    发明专利
    HIGH PERFORMANCE CHANNELS FOR DATA PROCESSING SYSTEMS BUS 未知

    公开(公告)号：CA2089771C

    公开(公告)日：1996-10-01

    申请号：CA2089771

    申请日：1993-02-18

    Applicant: IBM

    Inventor： BARTOW NEIL GEORGE ,  BROWN PAUL JOSEPH ,  CAPOWSKI ROBERT STANLEY ,  FASANO LOUIS THOMAS ,  GREGG THOMAS ANTHONY ,  SALYER GREGORY ,  WESTCOTT DOUGLAS WAYNE

    IPC: G06F13/00 ,  G06F13/12 ,  G06F13/38 ,  H04L69/40 ,  G06F13/14

    Abstract: Buffers are provided in two elements between which data is to be transferred wherein both buffers are managed solely by the originator of the data transfer. Only one transfer is required to transmit a message, and a second transfer acknowledges the completion of the function because message delivery to the receiver is guaranteed under the implemented protocol. When a request is sent, a message timer is started at the sender. When the normal response for the request is received, the timer is reset; however, if the duration of the message operation exceeds the timeout value, a message-timeout procedure is initiated. When the cancel command is issued, a second timer is set. If this timer is exceeded, subsequent cancel commands can be issued. If subsequent cancel commands are issued, a cancel complete command must be sent and responded to. Since the commands must be executed in the sequence in which they are received, a response to the cancel complete command ensures that there are no other cancel operation commands remaining in the receiver, allowing subsequent operations to start without danger of being canceled.

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