11.
    发明专利
    未知

    公开(公告)号:FR2345053A1

    公开(公告)日:1977-10-14

    申请号:FR7706669

    申请日:1977-02-28

    Applicant: IBM

    Inventor: FUNARI JOSEPH

    Abstract: This invention relates to a method and apparatus for wire bonding a variety of metals in the interconnection of semiconductor chips to electronic package substrate circuitries. A pair of electrically conducting bonding tip members are provided which are electrically isolated from one another and which are constructed of a material having a high resistivity. The wire is positioned beneath the tip members and a load is applied to the members to force the wire against a land on the substrate. A voltage source is provided to apply a voltage between the tip members. Activitation of the voltage source results in current flow through the tips and through the wire, in series, causing heating of the tip members and of the section of wire beneath them. Diffusion bonding will initiate before a significant amount of oxidation has had time to occur.

    12.
    发明专利
    未知

    公开(公告)号:DE2710835A1

    公开(公告)日:1977-09-29

    申请号:DE2710835

    申请日:1977-03-12

    Applicant: IBM

    Inventor: FUNARI JOSEPH

    Abstract: This invention relates to a method and apparatus for wire bonding a variety of metals in the interconnection of semiconductor chips to electronic package substrate circuitries. A pair of electrically conducting bonding tip members are provided which are electrically isolated from one another and which are constructed of a material having a high resistivity. The wire is positioned beneath the tip members and a load is applied to the members to force the wire against a land on the substrate. A voltage source is provided to apply a voltage between the tip members. Activitation of the voltage source results in current flow through the tips and through the wire, in series, causing heating of the tip members and of the section of wire beneath them. Diffusion bonding will initiate before a significant amount of oxidation has had time to occur.

    14.
    发明专利
    未知

    公开(公告)号:DE69113187T2

    公开(公告)日:1996-05-02

    申请号:DE69113187

    申请日:1991-07-26

    Applicant: IBM

    Abstract: A thin film electronic package which utilizes a circuitized substrate (e.g., a printed circuit board) having a flexible film carrier (11) electrically coupled thereto. The film carrier includes a dielectric layer (25) (e.g., polyimide) with first and second circuit layers (23, 27) located on opposite sides thereof. These circuit layers are interconnected, electrically, through the dielectric. An electronic device (13) (e.g., semiconductor chip) is electrically connected to bridging portions of the conductive leads of the carrier's first circuit layer, which bridging portions extend across apertures (29) provided within the dielectric. A plurality of solder elements (19) are utilized to provide electrical connection between respective contact locations of the electronic device and respective bridging portions of the first layer's conductive leads. Further a method of forming electrical connections between a flexible film carrier and an electronic device is described. The method comprises the steps of aligning the film carrier relative to the device having a plurality of solder mounds located on an upper surface thereof. The film carrier is engaged such that bridging portions of conductive leads thereof physically contact these solder mounds. Hot gas is passed through a screen member to heat the bridging portions of the leads to cause these leads to in turn heat the solder mounds to cause the mounds to become molten, whereafter these leads and mounds are cooled to form the desired solder bonds.

    ELECTRONIC PACKAGE WITH PLIANT HEAT SINK

    公开(公告)号:CA1290074C

    公开(公告)日:1991-10-01

    申请号:CA600081

    申请日:1989-05-18

    Applicant: IBM

    Abstract: EN988027 An electronic package including a first substrate (e.g., printed circuit board), a semiconductor device (e.g., silicon chip), a second circuitized substrate (e.g, polyimide having chrome-copper-chrome circuitry thereon) and a heat sink (e.g., extruded aluminum or copper). The heat sink includes pliant means (e.g., pliable leg members) secured thereto or forming part thereof such that the heat sink can be downwardly depressed a predetermined distance to effect contact with the semiconductor device without causing damage thereto. Such downward depression facilitates assembly of the package.

    MICRO-SURFACE WELDING
    18.
    发明专利

    公开(公告)号:CA1075832A

    公开(公告)日:1980-04-15

    申请号:CA274143

    申请日:1977-03-16

    Applicant: IBM

    Inventor: FUNARI JOSEPH

    Abstract: MICRO-SURFACE WELDING This invention relates to a method and apparatus for wire bonding a variety of metals in the interconnection of semiconductor chips to electronic package substrate circuitries. A pair of electrically conducting bonding tip members are provided which are electrically isolated from one another and which are constructed of a material having a high resistivity. The wire is positioned beneath the tip members and a load is applied to the members to force the wire against a land on the substrate. A voltage source is provided to apply a voltage between the tip members. Activitation of the voltage source results in current flow through the tips and through the wire, in series, causing heating of the tip members and of the section of wire beneath them. Diffusion bonding will initiate before a significant amount of oxidation has had time to occur.

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