公开(公告)号：AU2019377216B2

公开(公告)日：2022-11-24

申请号：AU2019377216

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30

Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

公开(公告)号：AU2019376835B2

公开(公告)日：2022-09-29

申请号：AU2019376835

申请日：2019-11-05

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

IPC: G06F9/30 ,  G06F9/38

Abstract: Saving and restoring machine state between multiple executions of an instruction. A determination is made that processing of an operation of an instruction executing on a processor has been interrupted prior to completion. Based on determining that the processing of the operation has been interrupted, current metadata of the processor is extracted. The metadata is stored in a location associated with the instruction and used to re-execute the instruction to resume forward processing of the instruction from where it was interrupted.

公开(公告)号：ZA202104999B

公开(公告)日：2022-08-31

申请号：ZA202104999

申请日：2021-07-15

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY THOMAS ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general-purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performed by the instruction being a compression function or a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：ZA202103133B

公开(公告)日：2022-07-27

申请号：ZA202103133

申请日：2021-05-10

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  RECKTENWALD MARTIN ,  SCHMIDT DONALD WILLIAM ,  SLEGEL TIMOTHY ,  PURANIK ADITYA NITIN ,  FARRELL MARK ,  JACOBI CHRISTIAN ,  BRADBURY JONATHAN ,  ZOELLIN CHRISTIAN GERHARD

Abstract: A Sort Lists instruction is provided to perform a sort and/or a merge operation. The instruction is an architected machine instruction of an instruction set architecture and is executed by a general-purpose processor of the computing environment. The executing includes sorting a plurality of input lists to obtain one or more sorted output lists, which are output.

公开(公告)号：ZA201904787B

公开(公告)日：2022-04-28

申请号：ZA201904787

申请日：2019-07-19

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes identifying a storage operand request as restrained, where the identifying includes obtaining, by a processing unit, an access intent instruction indicating an access intent associated with an operand of a next sequential instruction. The access intent indicates usage of the storage operand request is restrained. Further, the method includes determining whether a storage operand request is to a common storage location shared by multiple processing units of a computing environment and is identified restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request.

公开(公告)号：AU2020213853A1

公开(公告)日：2021-06-03

申请号：AU2020213853

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY THOMAS ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

IPC: G06F9/30

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general- purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performedby the instruction being a compression functionor a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：AU2018208453B2

公开(公告)日：2020-10-22

申请号：AU2018208453

申请日：2018-01-09

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F9/30

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：CA3127849A1

公开(公告)日：2020-08-06

申请号：CA3127849

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY THOMAS ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

IPC: G06F9/30

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general- purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performedby the instruction being a compression functionor a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：CA3037265A1

公开(公告)日：2018-07-19

申请号：CA3037265

申请日：2018-01-09

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  JACOBI CHRISTIAN ,  SHUM CHUNG-LUNG ,  SCHMIDT DONALD WILLIAM ,  ROSA DANIEL ,  SAPORITO ANTHONY

IPC: G06F9/30

Abstract: Processing of a storage operand request identified as restrained is selectively, temporarily suppressed. The processing includes determining whether a storage operand request to a common storage location shared by multiple processing units of a computing environment is restrained, and based on determining that the storage operand request is restrained, then temporarily suppressing requesting access to the common storage location pursuant to the storage operand request. The processing unit performing the processing may proceed with processing of the restrained storage operand request, without performing the suppressing, where the processing can be accomplished using cache private to the processing unit. Otherwise the suppressing may continue until an instruction, or operation of an instruction, associated with the storage operand request is next to complete.

公开(公告)号：MX390761B

公开(公告)日：2025-03-21

申请号：MX2021009157

申请日：2021-07-29

Applicant: IBM

Inventor： SOFIA ANTHONY THOMAS ,  MISHRA ASHUTOSH ,  GIAMEI BRUCE CONRAD ,  FARRELL MARK ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  SLEGEL TIMOTHY

IPC: H03M7/30 ,  G06F9/30 ,  H03M7/34 ,  H03M7/40 ,  H03M7/42

Abstract: Una indicación de procesador de propósito general de llamada a la conversión de DEFLACIÓN. Una indicación se obtiene por un procesador de propósito general del entorno de informática. La indicación es una indicación diseñada individual de conjunto de indicaciones que cumple con un estándar de industria para la compresión. La indicación se ejecuta, y la ejecución incluye transformar, con base en una función que se va a realizar por la indicación que es una función de compresión o una función de descompresión, el estado de los datos de entrada entre una forma no comprimida de los datos de entrada y una forma comprimida de los datos de entrada para proporcionar un estado transformado de datos. El estado transformado de los datos se proporciona como salida que se va a utilizar en la realización de una tarea.