公开(公告)号：ES2993311T3

公开(公告)日：2024-12-27

申请号：ES20701987

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE ,  SOFIA ANTHONY ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  FARRELL MARK ,  SLEGEL TIMOTHY ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN

IPC: G06F9/30

Abstract: Se obtiene una instrucción para realizar una función de una pluralidad de funciones. La instrucción es una instrucción diseñada de manera única de una arquitectura de conjunto de instrucciones que cumple con un estándar de la industria para la compresión. La instrucción se ejecuta, y la ejecución incluye realizar la función especificada por la instrucción. La ejecución incluye, en función de que la función sea una función de compresión o una función de descompresión, transformar el estado de los datos de entrada entre una forma no comprimida de los datos de entrada y una forma comprimida de los datos de entrada para proporcionar un estado transformado de acceso a los datos. Durante la ejecución de la función, se accede al historial relacionado con la función. El historial se va a utilizar para transformar el estado de los datos de entrada entre la forma no comprimida y la forma comprimida. (Traducción automática con Google Translate, sin valor legal)

公开(公告)号：AU2020214177B2

公开(公告)日：2022-12-01

申请号：AU2020214177

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  SOFIA ANTHONY THOMAS ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  FARRELL MARK ,  SLEGEL TIMOTHY ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN

IPC: G06F9/30

Abstract: An instruction to perform a function of a plurality of functions is obtained. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes performing the function specified by the instruction. The performing includes, based on the function being a compression function or a decompression function, transforming state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data accessing. During performing the function, history relating to the function is accessed. The history is to be used in transforming the state of input data between the uncompressed form and the compressed form.

公开(公告)号：AU2020214661B2

公开(公告)日：2022-09-22

申请号：AU2020214661

申请日：2020-01-14

Applicant: IBM

Inventor： RAISCH CHRISTOPH ,  KRAEMER MARCO ,  LEHNERT FRANK ,  KLEIN MATTHIAS ,  BRADBURY JONATHAN ,  JACOBI CHRISTIAN ,  BELMAR BRENTON ,  DRIEVER PETER

IPC: G06F9/30 ,  G06F13/00 ,  G06F13/20

Abstract: A data processing system (210) and a method for handling an input/output store instruction (30), comprising a system nest (18) communicatively coupled to at least one input/output bus (22) by an input/output bus controller (20). The data processing system (210) further comprises at least a data processing unit (216) comprising a core (12), a system firmware (10) and an asynchronous core-nest interface (14). The data processing unit (216) is communicatively coupled to the system nest (18) via an aggregation buffer (16). The system nest (18) is configured to asynchronously load from and/or store data to an external device (214) which is communicatively coupled to the input/output bus (22). The data processing unit (216) is configured to complete the input/output store instruction (30) before an execution of the input/output store instruction (30) in the system nest (18) is completed.

公开(公告)号：AU2020230012A1

公开(公告)日：2021-06-03

申请号：AU2020230012

申请日：2020-02-27

Applicant: IBM

Inventor： KURUP GIRISH GOPALA ,  KLEIN MATTHIAS ,  SOFIA ANTHONY THOMAS ,  BRADBURY JONATHAN ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN ,  BHATTACHARJEE DEEPANKAR

IPC: H03M7/40

Abstract: An aspect includes a system architecture that includes a processing unit, an accelerator, a main source buffer, a main target buffer, and a memory block. The main source buffer stores a first part of a source symbol received from an external source. The main target buffer stores an output symbol received from the accelerator. The memory block includes an overflow source buffer that stores the first part of the source symbol received from the main source buffer. The accelerator fetches the first part of the source symbol stored in the overflow source buffer and a second part of the source symbol stored in the main source buffer, and converts the first and second parts of the source symbol together into the output symbol. The second part of the source symbol includes a part of the source symbol not included in the first part of the source symbol.

公开(公告)号：ES3015283T3

公开(公告)日：2025-04-30

申请号：ES20700224

申请日：2020-01-14

Applicant: IBM

Inventor： RAISCH CHRISTOPH ,  KRAEMER MARCO ,  LEHNERT FRANK ,  KLEIN MATTHIAS ,  BRADBURY JONATHAN ,  JACOBI CHRISTIAN ,  DRIEVER PETER ,  BELMAR BRENTON

IPC: G06F9/30 ,  G06F13/20

公开(公告)号：HUE069005T2

公开(公告)日：2025-02-28

申请号：HUE20701987

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE ,  SOFIA ANTHONY ,  KLEIN MATTHIAS ,  WEISHAUPT SIMON ,  FARRELL MARK ,  SLEGEL TIMOTHY ,  MISHRA ASHUTOSH ,  JACOBI CHRISTIAN

IPC: G06F9/30

公开(公告)号：ZA202104999B

公开(公告)日：2022-08-31

申请号：ZA202104999

申请日：2021-07-15

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY THOMAS ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general-purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performed by the instruction being a compression function or a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：SG11202105494SA

公开(公告)日：2021-06-29

申请号：SG11202105494S

申请日：2020-02-20

Applicant: IBM

Inventor： KLEIN MATTHIAS ,  GIAMEI BRUCE ,  SOFIA ANTHONY ,  FARRELL MARK ,  SWANEY SCOTT ,  SLEGEL TIMOTHY

IPC: G06F9/455

Abstract: A system is provided and includes a plurality of machines. The plurality of machines includes a first generation machine and a second generation machine. Each of the plurality of machines includes a machine version. The first generation machine executes a first virtual machine and a virtual architecture level. The second generation machine executes a second virtual machine and the virtual architecture level. The virtual architecture level provides a compatibility level for a complex interruptible instruction to the first and second virtual machines. The compatibility level is architected for a lowest common denominator machine version across the plurality of machines. The compatibility level includes a lowest common denominator indicator identifying the lowest common denominator machine version.

公开(公告)号：AU2020213853A1

公开(公告)日：2021-06-03

申请号：AU2020213853

申请日：2020-01-23

Applicant: IBM

Inventor： GIAMEI BRUCE CONRAD ,  KLEIN MATTHIAS ,  SLEGEL TIMOTHY ,  FARRELL MARK ,  SOFIA ANTHONY THOMAS ,  WEISHAUPT SIMON ,  MISHRA ASHUTOSH

IPC: G06F9/30

Abstract: A DEFLATE Conversion Call general-purpose processor instruction. An instruction is obtained by a general- purpose processor of the computing environment. The instruction is a single architected instruction of an instruction set architecture that complies to an industry standard for compression. The instruction is executed, and the executing includes transforming, based on a function to be performedby the instruction being a compression functionor a decompression function, state of input data between an uncompressed form of the input data and a compressed form of the input data to provide a transformed state of data. The transformed state of the data is provided as output to be used in performing a task.

公开(公告)号：AU2020213829A1

公开(公告)日：2021-05-20

申请号：AU2020213829

申请日：2020-01-14

Applicant: IBM

Inventor： DRIEVER PETER ,  RAISCH CHRISTOPH ,  KRAEMER MARCO ,  LEHNERT FRANK ,  KLEIN MATTHIAS ,  BRADBURY JONATHAN ,  JACOBI CHRISTIAN ,  BELMAR BRENTON

IPC: G06F9/30 ,  G06F13/20

Abstract: A data processing system (210) and a method for handling an input/output store instruction (30), comprising a system nest (18) communicatively coupled to at least one input/output bus (22) by an input/output bus controller (20). The data processing system (210) further comprises at least a data processing unit (216) comprising a core (12), a system firmware (10) and an asynchronous core-nest interface (14). The data processing unit (216) is communicatively coupled to the system nest (18) via an aggregation buffer (16). The system nest (18) is configured to asynchronously load from and/or store data to at least one external device (214) which is communicatively coupled to the input/output bus (22). The data processing unit (216) is configured to complete the input/output store instruction (30) before an execution of the input/output store instruction (30) in the system nest (18) is completed. The asynchronous core-nest interface (14) comprises an input/output status array (44) with multiple input/output status buffers (24).