公开(公告)号：CA2009765A1

公开(公告)日：1990-11-17

申请号：CA2009765

申请日：1990-02-07

Applicant: IBM

Inventor： BAKER ERNEST D ,  DINWIDDIE JOHN M JR ,  GRICE LONNIE E ,  JOYCE JAMES M ,  LOFFREDO JOHN M ,  SANDERSON KENNETH R ,  SUAREZ GUSTAVO A

IPC: G06F11/18 ,  G06F11/00 ,  G06F11/10 ,  G06F11/16 ,  G06F11/20 ,  G06F15/16 ,  G06F15/173 ,  G06F15/177

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：CA1084112A

公开(公告)日：1980-08-19

申请号：CA263824

申请日：1976-10-20

Applicant: IBM

Inventor： HERKO JOSEPH M ,  JOYCE JAMES M

IPC: H02M3/145 ,  H02M3/155 ,  H02M3/28 ,  H02M3/337 ,  H02M1/08 ,  H02M3/335 ,  H02P13/26

Abstract: A PULSE WIDTH MODULATED VOLTAGE REGULATOR CONVERTER/POWER CONVERTER HAVING PUSH-PUSH REGULATOR-CONVERTER MEANS Disclosed herein is an improved pulse width modulated (PWM) voltage regulator-converter system which can function, alone, as a switched voltage regulator system or in combination with a switched power converter, synchronized therewith, to form an improved voltage regulator-converter/ power converter system. In the pulse width modulated voltage regulator-converter embodiment of the invention, secondary windings of a "current mode" regulator-converter interstage transformer are coupled to regulator-converter power transistors in a push-push circuit configuration. The primary windings of the regulator-converter interstage transformer are driven by a pulse width modulated logic control means connected thereto in a push-pull circuit configuration. Signals generated by a system clock means and an error signal, derived from the output of an averaging filter, drive the pulse width modulated control means such that logic signals generated at its output, at the primary windings of the regulator-converter interstage transformer, connected thereto, balances the magnetic operating point thereof and drive the regulator-converter power transistors, thereby increasing the maximum regulated output voltage of the voltage regulator-converter system after conditioning in an averaging filter.