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公开(公告)号：GB1175847A
公开(公告)日：1969-12-23
申请号：GB2740669
申请日：1966-12-21
Applicant: IBM
Inventor： MILEWSKI ANDRZEJ
IPC: H04Q3/00
Abstract: 1,175,847. Automatic exchange systems. INTERNATIONAL BUSINESS MACHINES CORP, 21 Dec., 1966 [4 Jan., 1966], No. 27406/69. Divided out of 1,175,846. Heading H4K. In a multistage switching network having only one path between a designated (subscribers) inlet and (junctor) outlet, route finding is effected with the aid of a memory map from which the free/busy conditions of corresponding pairs of links (one from the first stage and one to the last stage, one from the second stage and one to the penultimate stage, and so on) are extracted simultaneously and then retained as portions of a possible route only if both links of the pair are free . The "junctor outlets" are located at the centre of the network. The disclosure is substantially identical with that of the parent Specification 1,175,846 and for a full description attention is directed to that Specification.
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Patent Agency Ranking
公开(公告)号：GB1175846A
公开(公告)日：1969-12-23
申请号：GB5719766
申请日：1966-12-21
Applicant: IBM
Inventor： MILEWSKI ANDRZEJ
IPC: H04Q3/00
Abstract: 1,175,846. Automatic exchange systems. INTERNATIONAL BUSINESS MACHINES CORP. 21 Dec., 1966 [4 Jan., 1966], No. 57197/66. Heading H4K. In a PBX having a multistage switching network, some of the outlets of the matrices in an intermediate stage are linked by local junctors which are used for "own-exchange" calls. The other outlets from the intermediate stage are linked via further stages to incoming and outgoing trunks. There is only one path between any inlet or outlet of the network and a particular matrix in the intermediate stage. Links, matrics, inlets and outlets are identified by a system of co-ordinates and the co-ordinates of the two matrices connected to a local junctor are numerically related. Path finding is effected by means of a magnetic core "memory map". The natures of the crosspoints, registers and marker are not specified. Trunking.-Fig. 1.-The network comprises five stages of which the first consists of four groups each of eight, 16 x 12 matrices; the second consists of twelve groups each of four, 8 x 4 matrices; the third consists of the same twelve groups each of four, 4 x 3 matrices; the fourth consists again of the same twelve groups each of one, 4 x 4 matrix; while the fifth stage comprises four, 12 x 12 matrices. The rotation adopted consists for each matrix of a two co-ordinate number I, J viz. the first matrix in the fourth group of the first stage is identified as 3, 0. The outlets A of this matrix are connected to inlets J of second stage matrices identified by A, I. Thus considering the last outlet (A = 11) from matrix I = 3, J = 0 in the first stage, this outlet is connected to the J th , i.e. 0 or first inlet of the matrix A = 11, I = 3 of the second stage. The B th outlet from any of the A, I matrices is connected to the I th inlet of the third stage matrices A, B. One outlet from each A, B matrix is connected to one outlet of the adjacent matrix A + 1, B via a local junctor (details not given). For matrices such as 11, 0 in the last group, the one outlet 0, 0 is connected to the "adjacent" matrix, e.g. 0, 0 in the first group. The third outlet from an A, B matrix is connected to the B th inlet of a matrix A in the fourth stage whose L th outlet is in turn connected to the A th inlet of the L th matrix in the fifth stage. This method of trunking is depicted more clearly in, Fig. 3, which also shows the connecting path between a calling subscriber K and a called subscriber K 1 . Setting up a call.-A scanning system (not shown) detects calling lines and allots the necessary digit receivers. The identities, of the first stage matrices I, J and I 1 , J 1 to which the calling and called parties are connected, are inserted in binary stores (21-24 of, Fig. 4, not shown) while other stores (25-27) are set to the values A = 0; A + 1 = 1 and B = 0. Path seeking then proceeds in three phases P 1 , P 2 , P 3 During time slots T 1 , T 2 of phase P1 the identities of links IJA and IJ 1 (A + 1), [see. Fig. 3) are successively read-out from binary stores and inserted in a memory (28 Fig. 4). The free-busy conditions of these links are determined with the help of a memory map. If either is busy, the memory is cleared, the new values A = 1; A + 1 = 2 and B = 0 are inserted in the binary stores and the stores are then readout as before into the memory. If the values A=11;A+1=0 0 are reached without finding a free pair of links, the stores are cleared and busy tone is reverted. However if a free pair are located, phase P2 is allowed to commence, during T1 and T2 of which the availability of links AIB and (A + 1) I 1 B are checked in a similar manner. If a free link pair are not found after B has successively taken the values 0, 1, 2, phase 1 is returned to with A and A + 1 incremented by 1. Assuming that eventually a second/third stage link pair are found free, then phase P3 commences. The condition of the junctor indicated by the stored values of A and B is checked. If it is busy, phase P2 is recommenced with B incremented by 1. If and when a free junctor is found, the stored values of I, J, I 1 , J 1 , A, A + 1 and B together with the identities K-and K 1 of the calling and called parties are passed to a marker which operates the relevant crosspoints, ringing and supervision being controlled from the junctor. Memory map. (Fig. 8, not shown).-Each link and junctor threads a unique square-loop magnetic core whose state depends on the busy/ free condition of the associated link or junctor. The cores are also threaded co-ordinate fashion by wires extending from decoders connected to the memory and also by a readout wire. The latter produces an output signal during a small part of each time slot T1, T2, provided that the particular core being interrogated denotes a free link or junctor.
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公开(公告)号：DE3883540D1
公开(公告)日：1993-09-30
申请号：DE3883540
申请日：1988-12-13
Applicant: IBM
Inventor： LIETHOUDT THIERRY , MILEWSKI ANDRZEJ
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公开(公告)号：FR2337465A1
公开(公告)日：1977-07-29
申请号：FR7540417
申请日：1975-12-30
Applicant: IBM FRANCE
Inventor： MILEWSKI ANDRZEJ
Abstract: A method for determining the initial values of the coefficients of a complex transversal equalizer in a synchronous data transmission system employing Double Side Band-Quadrature Carrier (DSB-QC) modulation on a transmission channel having variable distortion from message to message is disclosed. The coefficients are derived from training sequences which consist of periodic pseudo-random sequences of complex numbers having a periodic autocorrelation function, all the coefficients of which except the first are zero. The amplitude of all complex numbers of the sequence is constant. Sequences with these characteristics are identified as CAZAC sequences. With the exception of a training sequence generator and a coefficient generator the system utilized is a conventional data transmission system utilizing the DSB-QC modulation technique.
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公开(公告)号：DE68918275T2
公开(公告)日：1995-03-30
申请号：DE68918275
申请日：1989-06-29
Applicant: IBM
Inventor： LEBIZAY GERALD , DEMANGE MICHEL , VEDRENNE ALAIN , MILEWSKI ANDRZEJ
Abstract: A 3-stage switching system is provided for generating, i.e. finding, reserving and setting, path from one switch entrance port (1) to at least one switch exit port (transmit side) for asynchronously received and buffered data cells. While an Nth cell is being transferred, control means (36) generate a control word including the switch exit port address for cell (N+1)th to be subsequently transferred. Said control word is used to find and reserve a path through the switch on a stage-by-stage basis, and then set said path, if any, using a fed back acknowledgement. The (N+1)th cell path generation is performed during cell N transfer, on a cycle stealing basis.
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公开(公告)号：FR2423929A1
公开(公告)日：1979-11-16
申请号：FR7522452
申请日：1975-07-10
Applicant: IBM FRANCE
Inventor： MILEWSKI ANDRZEJ
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