公开(公告)号：JPH07219914A

公开(公告)日：1995-08-18

申请号：JP404094

申请日：1994-01-19

Applicant: IBM

Inventor： KAWASE KATSURA ,  MORIYAMA TAKAO

IPC: G06F15/16 ,  G06F12/08 ,  G06F15/163

Abstract: PURPOSE: To allocable data sets to the element processors of a multi-processor system at a certain time of a data string, having regularity at high speed and to efficiently perform parallel execution of them. CONSTITUTION: A reference bit is provided for a cache block, and a mechanism is added for preventing allocation with all-read from the other caches to the cache block which has not yet been referred to. When new data are read into the cache block, the reference bit becomes '0' and when that cache block is referred to from a CPU, it becomes '1'. The basic operation is identical to the all-read protocol, and when it is not necessary to perform write-back to the relevant block but it can be replaced and the reference bit is '1' concerning the data read of the other caches, these data are fetched into the cache.

公开(公告)号：JPH0554004A

公开(公告)日：1993-03-05

申请号：JP23374991

申请日：1991-08-22

Applicant: IBM

Inventor： KAWASE KATSURA ,  MATSUMOTO TAKASHI ,  MORIYAMA TAKAO

IPC: G06F13/18 ,  G06F15/16 ,  G06F15/177 ,  G06T1/20

Abstract: PURPOSE: To enable a parallel execution of instructions to snapshot of data set at an arbitrary time which are sequentially updated by string data having sequentiality, by assigning the snapshot at a high speed to an element processor of a multi-processor 22. CONSTITUTION: In each element processor 22, plural selectively lackable memories, for example, triple memories 28, are provided to obtain a high speed snapshot of a data set at an arbitrary time. The snapshot is achieved by always keeping the latest content in a master memory 30, one of the triple memories 28, and locking one of the remaining two slave memories 31 and 32 at an arbitrary time. Next, when the snapshot become necessary, the slave memory 32 which is currently unlocked is used by locking it and the slave memory 31 locked up to now is released from locking and is renewed with the same content as that in the master memory 30.

公开(公告)号：CA2073540A1

公开(公告)日：1993-02-23

申请号：CA2073540

申请日：1992-07-09

Applicant: IBM

Inventor： KAWASE KEI ,  MATSUMOTO TAKASHI ,  MORIYAMA TAKAO

IPC: G06F13/18 ,  G06F15/16 ,  G06F15/177 ,  G06T1/20 ,  G06F12/02 ,  G06F3/14

Abstract: JA9-91-522 MULTIPROCESSOR SYSTEM, MEMORY MANAGING SYSTEM THEREFOR, AND GRAPHICS DISPLAY SYSTEM USING THE MULTIPROCESSOR SYSTEM To provide a snapshot at an arbitrary point of time in a data set, a set which is sequentially renewed by a series of data having a sequentiality to a plurality of element processors, and, to execute instructions for the snapshot in parallel and efficiently, a plurality of memories, for example, triple memories that can be selectively locked, are provided inside of each element processor to obtain a data set snapshot at an arbitrary time at high speed. One memory among the assumed triple memories, the master memory, is used to store the newest values, and, one of the remaining two memories, (slave memories), is locked at an arbitrary time to obtain a snapshot. The unlocked slave memory is made to have the same value as the master memory. When the next snapshot is needed, that unlocked slave memory is locked while the earlier locked slave memory is unlocked and made to have the same value as the master memory.