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    IMAGE DISPLAY SYSTEM
    1.
    发明申请
    IMAGE DISPLAY SYSTEM 审中-公开
    图像显示系统

    公开(公告)号：WO02071380A3

    公开(公告)日：2003-09-18

    申请号：PCT/GB0200934

    申请日：2002-03-05

    Applicant: IBM ,  IBM UK ,  KOHDA TAKENORI ,  FURUICHI SANEHIRO ,  OHARA MORIYOSHI ,  KAWASE KEI

    Inventor： KOHDA TAKENORI ,  FURUICHI SANEHIRO ,  OHARA MORIYOSHI ,  KAWASE KEI

    IPC: G06F3/153 ,  G06F3/14 ,  G09G3/20 ,  G09G5/00

    CPC classification number: G09G5/005 ,  G06F3/1462 ,  G09G5/006 ,  G09G2310/04 ,  G09G2340/02

    Abstract: An image display system comprises: a transmission device (PC) (10), for transmitting image data upon receiving a drawing command from an OS or an application; and a receiving monitor (40), for displaying, on a high-resolution panel (41), image data received via a monitor cable (39), wherein the transmission device (10) includes a drawing command analysis device (20), for detecting an area on a screen wherein the content is changed by the drawing command, and for employing the detected area to calculate an area to be transmitted, and a graphics card (12), for transmitting a packet that includes the calculated area to be transmitted, and control data provided as header data for the area to be transmitted, and wherein the receiving monitor (40) includes a packet reception device (50), for analyzing the header data in the received packet and for, based on the header data, rendering image data in an internally provided frame memory.

    Abstract translation: 一种图像显示系统，包括：发送装置（PC）（10），用于在从OS或应用程序接收到绘图命令时发送图像数据; 以及用于在高分辨率面板（41）上显示经由监视器电缆（39）接收的图像数据的接收监视器（40），其中所述传输设备（10）包括绘图命令分析设备（20），用于 检测屏幕上的区域，其中通过绘制命令改变内容，并且使用检测区域来计算要发送的区域;以及图形卡（12），用于发送包括计算出的要发送的区域的分组 ，以及作为要发送的区域的标题数据提供的控制数据，并且其中，所述接收监视器（40）包括分组接收装置（50），用于分析所接收的分组中的标题数据，并且基于所述标题数据， 在内部提供的帧存储器中渲染图像数据。

    MULTIPROCESSOR SYSTEM, MEMORY MANAGING SYSTEM THEREFOR, AND GRAPHICS DISPLAY SYSTEM USING THE MULTIPROCESSOR SYSTEM
    2.
    发明专利
    MULTIPROCESSOR SYSTEM, MEMORY MANAGING SYSTEM THEREFOR, AND GRAPHICS DISPLAY SYSTEM USING THE MULTIPROCESSOR SYSTEM 未知

    公开(公告)号：CA2073540A1

    公开(公告)日：1993-02-23

    申请号：CA2073540

    申请日：1992-07-09

    Applicant: IBM

    Inventor： KAWASE KEI ,  MATSUMOTO TAKASHI ,  MORIYAMA TAKAO

    IPC: G06F13/18 ,  G06F15/16 ,  G06F15/177 ,  G06T1/20 ,  G06F12/02 ,  G06F3/14

    Abstract: JA9-91-522 MULTIPROCESSOR SYSTEM, MEMORY MANAGING SYSTEM THEREFOR, AND GRAPHICS DISPLAY SYSTEM USING THE MULTIPROCESSOR SYSTEM To provide a snapshot at an arbitrary point of time in a data set, a set which is sequentially renewed by a series of data having a sequentiality to a plurality of element processors, and, to execute instructions for the snapshot in parallel and efficiently, a plurality of memories, for example, triple memories that can be selectively locked, are provided inside of each element processor to obtain a data set snapshot at an arbitrary time at high speed. One memory among the assumed triple memories, the master memory, is used to store the newest values, and, one of the remaining two memories, (slave memories), is locked at an arbitrary time to obtain a snapshot. The unlocked slave memory is made to have the same value as the master memory. When the next snapshot is needed, that unlocked slave memory is locked while the earlier locked slave memory is unlocked and made to have the same value as the master memory.

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