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    12.
    发明专利
    未知

    公开(公告)号：DE68920523D1

    公开(公告)日：1995-02-23

    申请号：DE68920523

    申请日：1989-08-24

    Applicant: IBM

    Inventor： EGGENBERGER JOHN SCOTT ,  HODGES PAUL ,  PATEL ARVIND MOTIBHAI

    IPC: G06F11/10 ,  G11B20/18 ,  H03M13/00

    Abstract: A method is disclosed for correcting multibyte errors in a magnetic medium on which data is recorded in variable length blocks that comprise sub-blocks of data bytes and corresponding check bytes and include error correction code (ECC) for which ECC syndromes are generated during reading. A sequence of N sequential parity check bytes is written at the end of each block. After ECC syndromes are generated during reading, parity syndromes are generated by comparing parity check bytes computed from data bytes and check bytes as read with the parity check bytes as written. When a long-burst error occurs, a pointer points to the first of the N consecutive bytes in a block that could have been influenced by the error burst. After correcting correctable errors in all sub-blocks not affected by the N bytes identified by the pointer, and adjusting the parity syndromes for errors thus corrected, the adjusted parity syndromes are used to correct the errors in the N bytes indicated by the pointer. Unused ECC syndromes are then adjusted for errors corrected by the adjusted parity syndromes and used to correct all correctable errors then remaining.

    13.
    发明专利
    未知

    公开(公告)号：DE3850192T2

    公开(公告)日：1995-01-12

    申请号：DE3850192

    申请日：1988-08-23

    Applicant: IBM

    Inventor： ANDERSON ROBERT WHITCOMB ,  GEE RALPH LEONARD ,  INDELICATO JASPER ANTHONY ,  PATEL ARVIND MOTIBHAI

    IPC: H03M13/00 ,  G11B20/12 ,  G11B20/18 ,  G06F11/10

    Abstract: The invention relates to a method of correcting errors in encoded uncorrected data in a disk storage device, employing a multiple level error correction code for use with records of varying length, including initially formatting the data into blocks, each comprising subblocks, which, except for possibly the last, are of equal size, the number of subblocks in any record being determined by the length of that record. The method is characterised by the steps of statistically determining, as a function of subblock size, first level correction capability and the length of the longest record anticipated, a number representing the minimum number of subblocks which may be in error and correctable; transmitting the uncorrected data to a storage director; performing at least a portion of the first level of error correction at the storage device; and, after all uncorrected data has been received by the storage director, transmitting error information reflecting first level error pattern and location to the storage director for completion of the first level of correction and performance of subsequent levels of correction. The invention also relates to apparatus for performing a method of correcting errors as above.

    15.
    发明专利
    未知

    公开(公告)号：DE3787900D1

    公开(公告)日：1993-12-02

    申请号：DE3787900

    申请日：1987-02-10

    Applicant: IBM

    Inventor： PATEL ARVIND MOTIBHAI

    IPC: H03M13/00 ,  G11B20/18 ,  H03M13/09

    Abstract: The present invention relates to apparatus for generating a set of CRC check bytes for a variable-length record formed as a sequence of data bytes and error correction check bytes inserted into the sequence of data bytes at preselected intervals. The apparatus comprises a computing system adapted to operate on the sequence of data bytes and error correction check bytes in order to generate the set of CRC check bytes. … According to the invention the apparatus is characterised in that the computing system comprises… first computing means for sequentially receiving the sequence of data bytes and error correction check bytes in the record and for multiplying all the data bytes and error correction check bytes, except for a first preselected set of the error correction check bytes, by a matrix of the form T , where n is an integer and different from any integer used for computing the error correction check bytes, in order to generate a first sub-set of CRC check bytes,… second computing means for sequentially receiving the sequence of data bytes and error correction check bytes in the record and for multiplying all the data bytes and error correction check bytes, except for a second preselected set of the error correction check bytes, by a matrix of the form T in order to generate a second sub-set of CRC check bytes, and… means for combining the first and second sub-sets of CRC check bytes so as to generate the set of CRC check bytes.

    18.
    发明专利
    未知

    公开(公告)号：BR8307181A

    公开(公告)日：1984-08-07

    申请号：BR8307181

    申请日：1983-12-27

    Applicant: IBM

    Inventor： PATEL ARVIND MOTIBHAI

    IPC: G06F11/10 ,  G11B20/18 ,  H03M13/00 ,  H03M13/15 ,  G06F11/08 ,  G06F15/20

    Abstract: A syndrome processing unit for a multibyte error correcting system includes logical circuitry for performing product operation on selected pairs of 8-bit syndrome bytes, and exclusive-OR operations on selected results of the product operations are selectively combined to define usable cofactors that correspond to coefficients of the error locator polynomial if the codeword contains less than the maximum number of errors for which the system has been designed.

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