公开(公告)号：DE3165658D1

公开(公告)日：1984-09-27

申请号：DE3165658

申请日：1981-05-25

Applicant: IBM

Inventor： GARNACHE RICHARD RAYMOND ,  KENNEY DONALD MCALPINE ,  THOMA NANDOR GYORGY

IPC: H01L21/28 ,  H01L21/768 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/423 ,  H01L29/78 ,  H01L29/60 ,  H01L21/90

Abstract: High density VMOSFET devices, particularly single transistor memory cells, are provided by use of a series of simplified self-aligning process steps. Gate electrodes, source/drain regions and source/drain contacts are provided with the aid of an initial mask-less photoresist removal process in which a relatively thick layer of self-leveling photoresist is uniformly removed in order to define portions of a gate electrode within the recess of a V-groove. The gate electrode subsequently acts as a self-aligned mask to define implanted source/drain regions also within the V-groove and to enable second level interconnecting metallurgy contacts to be formed along the sidewalls of the V-groove.