-
公开(公告)号：DE3763608D1
公开(公告)日：1990-08-16
申请号：DE3763608
申请日：1987-02-17
Applicant: IBM
Inventor： EL-KAREH BADIH , GARNACHE RICHARD RAYMOND , GHATALIA ASHWIN KANTILAL
IPC: H01L21/76 , H01L21/74 , H01L21/762 , H01L21/8224 , H01L21/8228 , H01L27/082 , H01L21/31 , H01L27/10 , H01L21/312
Abstract: A method is provided for making a semiconductor structure which includes the steps of forming in a semiconductor body a P/N junction and a first opening (50, 54) in a first insulating layer (42) disposed on the surface of the semiconductor body. A trench (22) is then formed in the semiconductor body having a sidewall located along a given plane through the opening and through the P/N junction. A second layer of insulation (56) is formed within the opening and on the sidewall of the trench. An insulating material (24) is disposed within the trench (22) and over the second insulating layer (56) in the opening and a block (62) or segment of material is located over the trench (22) so as to extend a given distance from the trench over the upper surface of the body. The insulating material (24) and the block (62) are then etched so as to remove the block and the insulating material along the sides of the block. The exposed portions of the second insulating layer (56) are now etched to form a second opening therein within the first opening (50, 54) in the first insulating layer (42). A layer (64) of low viscosity material, such as a photoresist, is formed over the semiconductor body so as to cover the remaining portion of the insulating material (24), the layer (64) of low viscosity material and the insulating material (24) having similar etch rates. The layer (64) of low viscosity material and the insulating material (24) are then simultaneously etched directionally, e.g., by a reactive ion etching process (RIE), until all of the layer (64) of low viscosity material is removed to at least the surface of the second insulating layer (56) at the trench (22). Any suitable wet etchant may then be used, if desired, to remove any remaining low viscosity material disposed within the second opening in the second insulating layer. Metallic contacts (WT, WB, BO) may now be formed, e.g., by evaporation, on the surface of the semiconductor body within the second opening in the second insulating layer without the concern that the metallic material will seep or enter into the trench causing a short at the P/N junction. … In a preferred embodiment of the invention, the insulating material (24) is polyimide and the block (62) of material, as well as the layer (64) of low viscosity material, is made of photoresist.
-
-
公开(公告)号：DE3787687T2
公开(公告)日：1994-05-05
申请号：DE3787687
申请日：1987-06-23
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD MACALPINE
IPC: H01L27/10 , H01L21/8242 , H01L27/108
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
公开(公告)号：DE2363466A1
公开(公告)日：1974-07-04
申请号：DE2363466
申请日：1973-12-20
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , SMITH JUN WILLIAM MICHAEL
IPC: H01L21/225 , H01L23/522 , H01L27/07 , H01L27/108 , H01L19/00
-
公开(公告)号：DE3787687D1
公开(公告)日：1993-11-11
申请号：DE3787687
申请日：1987-06-23
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD MACALPINE
IPC: H01L27/10 , H01L21/8242 , H01L27/108
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
Patent Agency Ranking
公开(公告)号：NO172714C
公开(公告)日：1993-08-25
申请号：NO872721
申请日：1987-06-29
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD MACALPINE
IPC: H01L21/8242 , H01L27/108 , H01L27/10 , G11C11/34
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
公开(公告)号：BR8703296A
公开(公告)日：1988-03-15
申请号：BR8703296
申请日：1987-06-29
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNY DONALD MCALPINE
IPC: H01L27/10 , H01L21/8242 , H01L27/108 , H01L29/00 , G11C11/24
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
公开(公告)号：ES2044872T3
公开(公告)日：1994-01-16
申请号：ES87108924
申请日：1987-06-23
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD MACALPINE
IPC: H01L27/10 , H01L21/8242 , H01L27/108
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
公开(公告)号：AT95632T
公开(公告)日：1993-10-15
申请号：AT87108924
申请日：1987-06-23
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD
IPC: H01L27/10 , H01L21/8242 , H01L27/108
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
公开(公告)号：NO172714B
公开(公告)日：1993-05-18
申请号：NO872721
申请日：1987-06-29
Applicant: IBM
Inventor： GARNACHE RICHARD RAYMOND , KENNEY DONALD MACALPINE
IPC: H01L21/8242 , H01L27/108 , H01L27/10 , G11C11/34
Abstract: A memory is provided which includes a semiconductor substrate (26) having a major surface and a trench (24) disposed therein having a longitudinal axis, storage means (16, 16') disposed on a given sidewall of the trench, switching means (12, 12') having a control element and a current carrying element disposed on the given sidewall of the trench between the storage means and the major surface of the substrate and coupled to the storage means, a first electrically conductive line (40, 40') disposed on the given sidewall in contact with the control element of the switching means and having a longitudinal axis arranged parallel to the longitudinal axis of the trench, and a second electrically conductive line (22, 22') disposed on the major surface of the semiconductor substrate in contact with the current carrying electrode of the switching means and having a longitudinal axis arranged orthogonal to the longitudinal axis of the trench.
-
-
-
-
-
-
-
-
-
Search Results
20
records
(took 0.017 seconds)
