公开(公告)号：SG87850A1

公开(公告)日：2002-04-16

申请号：SG1999005476

申请日：1999-11-05

Applicant: IBM

Inventor： TOSHIHARU FURUKAWA ,  MARK C HAKEY ,  STEVEN J HOLMES ,  DAVID V HORAK ,  PAUL A RABIDOUX

IPC: H01L21/28 ,  G03C5/00 ,  H01L21/027 ,  H01L21/302 ,  H01L21/32 ,  H01L21/60 ,  H01L21/768

Abstract: A method for forming contacts on an integrated circuit that are self-aligned with the wiring patterns of the integrated circuit. In the method a thicker lower layer of a first material and a thinner upper layer of a second material are formed on a substrate. The features of the metal wiring is patterned first on the upper layer. The wiring pattern trenches are etched through the thinner surface layer, and partially through the second, thicker layer. After the wiring pattern is etched, the contacts for the wiring layer are printed as line/space patterns which intersect the wiring pattern. The contact pattern is etched into the lower, thicker layer with an etch process that is selective to the upper thinner layer. The contact is only formed at the intersection point of the wiring image with the contact image, therefore the contact is self-aligned to the metal.