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    HYBRID PHOTORESIST HAVING LOW K-COEFFICIENT
    6.
    发明专利
    HYBRID PHOTORESIST HAVING LOW K-COEFFICIENT 失效

    公开(公告)号：JPH10104839A

    公开(公告)日：1998-04-24

    申请号：JP22522597

    申请日：1997-08-21

    Applicant: IBM

    Inventor： STEVEN J HOLMES ,  AHAMADO D KATONANI ,  NIRANJAN M PATEL ,  PAUL A LABIDACKS

    IPC: G03F7/004 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095 ,  H01L21/027

    Abstract: PROBLEM TO BE SOLVED: To provide a photoresist having both of positive and negative components and has a lower k-coefft. than a photoresist of either a positive or negative type. SOLUTION: This hybrid photoresist contains either a negative resist or a positive resist in the main part, while the part having the other resist is rather small. For example, a small part of a positive resist contains a negative crosslinking agent, while a negative resist contains functional groups which react as a positive type. By using this hybrid resist, the window which limits the quantity for exposure light can be enlarged, and thereby, the production yield, performance and line density can be improved.

    FREQUENCY DOUBLING HYBRID PHOTORESIST
    7.
    发明专利
    FREQUENCY DOUBLING HYBRID PHOTORESIST 失效

    公开(公告)号：JPH10104834A

    公开(公告)日：1998-04-24

    申请号：JP22504197

    申请日：1997-08-21

    Applicant: IBM

    Inventor： MARK C HEIKEE ,  STEVEN J HOLMES ,  DAVID V HAULICK ,  AHAMADO D KATONANI ,  NIRANJAN M PATEL ,  PAUL A LABIDACKS

    IPC: G03F7/004 ,  G03F7/038 ,  G03F7/039 ,  G03F7/095 ,  H01L21/02 ,  H01L21/027 ,  H01L21/308

    Abstract: PROBLEM TO BE SOLVED: To make it possible to extremely precisely control images with an image size as a target separate form the image size control on a reticle by constituting this regency doubling hybrid phutorsist by, having both of negative type response and positive type response and forming spaces in diffraction regions exposed with an intermediate quantity of irradiation energy. SOLUTION: This hybrid resist simultaneously has both responsiveness of the positive type and negative type to exposure. The solubility of the hybrid resist is increased in the regions, such as regions near the edges of the reticule images, where the exposure intensity is degraded by a diffraction effect by positive responsibility. When the irradiation quantity increases, the negative type responsiveness is dominant. Then, the solubility in the regions where the exposure is large degrades. When a substrate is printed with reticle line patterns, space/line/space patterns are obtd. The space images are 'frequency doubled' in such a manner, the features of double the case of a standard resist are formed. Such hybrid resist exhibits the patterns distinctly different from the positive type resist and the negative type resist.

    PRINTING SUBLITHOGRAPHIC IMAGES USING A SHADOW MANDREL AND OFF-AXIS EXPOSURE
    8.
    发明专利
    PRINTING SUBLITHOGRAPHIC IMAGES USING A SHADOW MANDREL AND OFF-AXIS EXPOSURE 未知

    公开(公告)号：MY115933A

    公开(公告)日：2003-09-30

    申请号：MYPI19994296

    申请日：1999-10-06

    Applicant: IBM

    Inventor： TOSHIHARU FURUKAWA ,  MARK C HAKEY ,  DAVID V HORAK ,  STEVEN J HOLMES ,  PAUL A RABIDOUX

    IPC: H01L21/336 ,  G03F7/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/033 ,  H01L21/28 ,  H01L21/311 ,  H01L21/768

    Abstract: THE PRESENT INVENTION OVERCOMES THE LIMITATIONS OF THE PRIOR ART TO ALLOW FOR THE CREATION OF SMALLER COMPONENTS FOR USE IN LOGIC CIRCUITS. THE INVENTION PROVIDES A NEW METHOD OF DEFINING AND FONNING FEATURES ON A SEMICONDUCTOR SUBSTRATE BY USING A LAYER OF MATERIAL (210, 1010), REFERRED TO AS A SHADOW MANDREL LAYER, TO CAST A SHADOW (319, 1119, 1508). A TROUGH (312, 1112, 1506) IS ETCHED IN THE SHADOW MANDREL LAYER. AT LEAST ONE SIDE OF THE TROUGH WILL BE USED TO CAST A SHADOW IN THE BOTTOM (313, 1113) OF THE TROUGH. A CONFORMALLY DEPOSITED PHOTORESIST (314, 1114) USED TO CAPTURE THE IMAGE OF THE SHADOW. THE IMAGE OF THE SHADOW IS USED TO DEFINE AND FORM A FEATURE. THIS ALLOWS FOR THE CREATION OF IMAGES ON THE SURFACE OF A WAFER (202, 1002, 1504) WITHOUT THE DIFFRACTION EFFECTS ENCOUNTERED IN CONVENTIONAL PHOTOLITHOGRAPHY. THIS ALLOWS FOR A REDUCED DEVICE SIZE AND INCREASED CHIP OPERATING SPEED.FIG. 1

    PROCESS FOR SELF-ALIGNMENT OF SUB-CRITICAL CONTACTS TO WIRING
    9.
    发明专利
    PROCESS FOR SELF-ALIGNMENT OF SUB-CRITICAL CONTACTS TO WIRING 未知

    公开(公告)号：SG87850A1

    公开(公告)日：2002-04-16

    申请号：SG1999005476

    申请日：1999-11-05

    Applicant: IBM

    Inventor： TOSHIHARU FURUKAWA ,  MARK C HAKEY ,  STEVEN J HOLMES ,  DAVID V HORAK ,  PAUL A RABIDOUX

    IPC: H01L21/28 ,  G03C5/00 ,  H01L21/027 ,  H01L21/302 ,  H01L21/32 ,  H01L21/60 ,  H01L21/768

    Abstract: A method for forming contacts on an integrated circuit that are self-aligned with the wiring patterns of the integrated circuit. In the method a thicker lower layer of a first material and a thinner upper layer of a second material are formed on a substrate. The features of the metal wiring is patterned first on the upper layer. The wiring pattern trenches are etched through the thinner surface layer, and partially through the second, thicker layer. After the wiring pattern is etched, the contacts for the wiring layer are printed as line/space patterns which intersect the wiring pattern. The contact pattern is etched into the lower, thicker layer with an etch process that is selective to the upper thinner layer. The contact is only formed at the intersection point of the wiring image with the contact image, therefore the contact is self-aligned to the metal.

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