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公开(公告)号:DE69835180D1
公开(公告)日:2006-08-24
申请号:DE69835180
申请日:1998-03-17
Applicant: INFINEON TECHNOLOGIES AG
Inventor: TOBBEN DIRK , WEIGAND PETER
IPC: H01L27/04 , H01L27/108 , B81B3/00 , H01L21/02 , H01L21/32 , H01L21/822 , H01L21/8242
Abstract: A method for forming a microstructure includes photolithographically forming a vertically extending post on a portion of a surface of a substrate to provide a first structure. A flowable, sacrificial material is deposited over a surface of the first structure. The flowable, sacrificial materially flows off the top surface and sidewall portions of the post onto adjacent portions of the surface of the substrate to provide a second structure. A non-sacrificial material is deposited over a surface of the second structure. The non-sacrificial material is deposited to conform to the surface of the second structure. The non-sacrificial is deposited over the sacrificial material, over the sidewall portions and over the top surface of the post. The deposited sacrificial material is selectively removed while the non-sacrificial material remains to form a third structure with a horizontal member provided by the non-sacrificial material. The horizontal member is supported a predetermined distance above the surface of the substrate by a lower portion of the post. The flowable material is a flowable oxide, for example, hydrogensilsesquioxane glass, and the post has a width less than 20 mu m. The resulting structure, formed with a single photolithographic step, is used for supporting a capacitor deposited over it. The capacitor is formed as a sequence of deposition steps; i.e., depositing a first conductive layer over a surface of the support structure; depositing a dielectric layer over the conductive layer; and depositing a second conductive layer over the dielectric layer.
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公开(公告)号:JPH11162987A
公开(公告)日:1999-06-18
申请号:JP27846198
申请日:1998-09-30
Applicant: SIEMENS AG , IBM
Inventor: VARIAN KATHRYN H , TOBBEN DIRK , SENDELBACH MATTHEW
IPC: H01L21/302 , H01L21/3065 , H01L21/3105 , H01L21/3205 , H01L21/762 , H01L21/768 , H01L23/522
Abstract: PROBLEM TO BE SOLVED: To produce a substantial plane where recessed transformation of wide space is reduced, by performing CMP polishing on a nonconformal layer accumulated on complicated landform comprising narrow parts accompanied with narrow gaps, wide parts, and wide gaps. SOLUTION: A nonconformal layer 160 is made on the surface of a substrate 101. Because of the nonconformality of this layer 160, thickness on the surface of a wide active region 112 is thicker than the thickness of a narrow active region 110. Polysilicon (poly) is accumulated on the surface by CVD. A conformal poly layer arises on the nonconformal layer 160 by CVD. The poly layer is flattened selectively by CMP to an oxide. For the CMP polishing, the protuberance of polysilicon is polished first, and the surface of polysilicon is flattened gradually as the material is removed from there. CMP is continued until the surface of the oxide layer 160 in the protuberance region is exposed and a flat top 179 arises.
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公开(公告)号:JP2002026146A
公开(公告)日:2002-01-25
申请号:JP2001180648
申请日:2001-06-14
Applicant: IBM
Inventor: DIVAKARUNI RAMA , JAMMY RAJARAO , BYOON WAI KIMU , MANDELMAN JACK A , SUDO AKIRA , TOBBEN DIRK
IPC: H01L21/8242 , H01L27/108 , H01L29/94
Abstract: PROBLEM TO BE SOLVED: To provide a structure and a method for a trench-type capacitor improved in its charge holding capability. SOLUTION: The memory device includes a trench 23 which is formed on a substrate and has an upper part. A collar oxide film 21 is arranged at the upper part of the trench. A collar oxide film includes a pedestal 25. A conductor is charged in the trench. The pedestal reduces a leak of charges in the conductor. The method for forming the memory device, having the collar oxide film having the pedestal collar, is also disclosed.
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公开(公告)号:JP2001044384A
公开(公告)日:2001-02-16
申请号:JP2000220682
申请日:2000-07-21
Applicant: IBM , INFINEON TECHNOLOGIES CORP
Inventor: GRUENING ULRIKE , RADENS CARL J , TOBBEN DIRK
IPC: H01L27/108 , H01L21/76 , H01L21/8242
Abstract: PROBLEM TO BE SOLVED: To reduce a method for forming an embedded plate diffusion region in a deep trench storage capacitor by filling a non-photosensitive underfill material into the lower region of a trench before forming a collar at the upper region of the trench. SOLUTION: A trench 10 is covered with a thin barrier film 30, and a non- photosensitive underfill 16 is filled into the lower region of the trench 10. Then, the barrier film 30 is eliminated by an upper region 223 of the trench 10 by chemical etching using wet solution or the like. Also, the underfill 16 masks a lower region, 24 while the barrier film 30 at the upper region 22 is being removed. Then, the underfill 16 is removed from a lower region by stripping or the like by a chemical containing HF, and a collar 32 is formed at the upper region 22 by thermal oxidation growth or the like by the local oxidation process.
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公开(公告)号:DE60036305T2
公开(公告)日:2008-05-15
申请号:DE60036305
申请日:2000-10-04
Applicant: IBM , QIMONDA NORTH AMERICA CORP
Inventor: TOBBEN DIRK , GAMBINO JEFFREY
IPC: H01L21/768 , H01L23/522
Abstract: A method for connecting metal structures with self-aligned metal caps, in accordance with the invention, includes providing a metal structure in a first dielectric layer. The metal structure and the first dielectric layer share a substantially planar surface. A cap metal is selectively depositing on the metal structure such that the cap metal is deposited only on the metal structure. A second dielectric layer is formed over the cap metal. The second dielectric layer is opened to form a via terminating in the cap metal. A conductive material is deposited in the via to provide a contact to the metal structure through the cap metal.
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公开(公告)号:DE60036305D1
公开(公告)日:2007-10-18
申请号:DE60036305
申请日:2000-10-04
Applicant: INFINEON TECHNOLOGIES CORP , IBM
Inventor: TOBBEN DIRK , GAMBINO JEFFREY
IPC: H01L21/768 , H01L23/522
Abstract: A method for connecting metal structures with self-aligned metal caps, in accordance with the invention, includes providing a metal structure in a first dielectric layer. The metal structure and the first dielectric layer share a substantially planar surface. A cap metal is selectively depositing on the metal structure such that the cap metal is deposited only on the metal structure. A second dielectric layer is formed over the cap metal. The second dielectric layer is opened to form a via terminating in the cap metal. A conductive material is deposited in the via to provide a contact to the metal structure through the cap metal.
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公开(公告)号:DE69939300D1
公开(公告)日:2008-09-25
申请号:DE69939300
申请日:1999-06-17
Applicant: SIEMENS AG , IBM
Inventor: ARNDT KENNETH C , GAMBINO JEFFREY P , MANDELMA JACK A , NARAYAN CHANDRASEKHAR , SCHNABEL RAINES F , SCHUTZ RONALD J , TOBBEN DIRK
IPC: H01L21/82 , H01L23/525 , H01L21/768
Abstract: A semiconductor structure comprising a semiconductor substrate, an electrically conductive level on the substrate and a metal fuse located at the conductive level wherein the fuse comprises a self-aligned dielectric etch stop layer thereon is provided along with processes for its fabrication.
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公开(公告)号:HK1032292A1
公开(公告)日:2001-07-13
申请号:HK01102673
申请日:2001-04-17
Applicant: IBM , INFINEON TECHNOLOGIES CORP
Inventor: GRUENING ULRIKE , RADENS CARL J , TOBBEN DIRK
IPC: H01L21/76 , H01L27/108 , H01L21/8242 , H01L
Abstract: A process for manufacturing a deep trench capacitor in a trench (10). The capacitor comprises a collar (18) in an upper region of the trench and a buried plate (26) in a lower region of the trench. The improvement comprises, before forming the collar in the trench upper region, filling the trench lower region with a non-photosensitive underfill material (16) such as spin-on-glass. The process may comprise the steps of (a) forming a deep trench in a substrate; (b) filling the trench lower region with an underfill material; (c) forming a collar in the trench upper region; (d) removing the underfill; and (e) forming a buried plate in the trench lower region.
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