公开(公告)号：US10329140B2

公开(公告)日：2019-06-25

申请号：US15892102

申请日：2018-02-08

Applicant: Infineon Technologies AG

Inventor： Marco Haubold ,  Henning Feick ,  Kerstin Kaemmer

IPC: B81B3/00 ,  H01L27/00

Abstract: A semiconductor device includes at least one suspension region of a membrane structure, where the suspension region lies laterally in a first region of a surface of a semiconductor substrate; and a membrane region of the membrane structure, where a cavity is arranged vertically between the membrane region and at least one part of the semiconductor substrate, and the first region of the surface of the semiconductor substrate is formed by a surface of a shielding doping region of the semiconductor substrate.

公开(公告)号：US20180151765A1

公开(公告)日：2018-05-31

申请号：US15881100

申请日：2018-01-26

Applicant: Infineon Technologies AG

Inventor： Thomas Bever ,  Henning Feick ,  Dirk Offenberg ,  Stefano Parascandola ,  lnes Uhlig ,  ThoraIf Kautzsch ,  Dirk Meinhold ,  Hanno Melzner

IPC: H01L31/0352 ,  H01L27/148 ,  G01S7/491

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted. At least one embodiment provides a semiconductor substrate comprising a photo-conversion region to convert light into photo-generated charge carriers; a region to accumulate the photo-generated charge carriers; a control electrode structure including a plurality of control electrodes to generate a potential distribution such that the photo-generated carriers are guided towards the region to accumulate the photo-generated charge carriers based on signals applied to the control electrode structure; a non-uniform doping profile in the semiconductor substrate to generate an electric field with vertical field vector components in at least a part of the photo-conversion region

公开(公告)号：US20180061756A1

公开(公告)日：2018-03-01

申请号：US15654526

申请日：2017-07-19

Applicant: Infineon Technologies AG

Inventor： Kerstin Kaemmer ,  Martin Bartels ,  Henning Feick

IPC: H01L23/525 ,  H01L27/112 ,  H01L27/102 ,  G11C17/16

CPC classification number: H01L23/5252 ,  G11C17/16 ,  G11C17/18 ,  H01L27/1026 ,  H01L27/11206

Abstract: One time programmable memory cell and memory arrayMemory cells and corresponding memory arrays are provided. The memory cell comprises a fusable element and a bipolar transistor arranged adjacent to the fusable element.

公开(公告)号：US20150371995A1

公开(公告)日：2015-12-24

申请号：US14309968

申请日：2014-06-20

Applicant: Infineon Technologies AG

Inventor： Kerstin Kaemmer ,  Thomas Bertrams ,  Henning Feick ,  Olaf Storbeck ,  Matthias Schmeide

IPC: H01L27/112 ,  H01L21/02 ,  H01L29/167 ,  H01L29/51 ,  H01L29/423 ,  H01L29/36 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L27/11206 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28211 ,  H01L21/2822 ,  H01L23/5256 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/512 ,  H01L29/513 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract translation: 根据各种实施例，一种用于处理载体的方法可以包括：用氟掺杂载体，使得载体的第一表面区域是氟掺杂的，载体的第二表面区域是不含氟掺杂或 比第一表面区域少掺杂氟; 以及氧化所述载体以从所述载体的所述第一表面区域以第一厚度生长第一栅极氧化物层，并且与所述载体的所述第二表面区域同时地具有不同于所述第一厚度的第二厚度。

公开(公告)号：US09202815B1

公开(公告)日：2015-12-01

申请号：US14309968

申请日：2014-06-20

Applicant: Infineon Technologies AG

Inventor： Kerstin Kaemmer ,  Thomas Bertrams ,  Henning Feick ,  Olaf Storbeck ,  Matthias Schmeide

IPC: H01L29/66 ,  H01L27/112 ,  H01L21/265 ,  H01L21/02 ,  H01L29/51 ,  H01L29/423 ,  H01L29/36 ,  H01L29/167

CPC classification number: H01L27/11206 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28211 ,  H01L21/2822 ,  H01L23/5256 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/512 ,  H01L29/513 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to various embodiments, a method for processing a carrier may include: doping a carrier with fluorine such that a first surface region of the carrier is fluorine doped and a second surface region of the carrier is at least one of free from the fluorine doping or less fluorine doped than the first surface region; and oxidizing the carrier to grow a first gate oxide layer from the first surface region of the carrier with a first thickness and simultaneously from the second surface region of the carrier with a second thickness different from the first thickness.

Abstract translation: 根据各种实施例，一种用于处理载体的方法可以包括：用氟掺杂载体，使得载体的第一表面区域是氟掺杂的，载体的第二表面区域是不含氟掺杂或 比第一表面区域少掺杂氟; 以及氧化所述载体以从所述载体的所述第一表面区域以第一厚度生长第一栅极氧化物层，并且与所述载体的所述第二表面区域同时地具有不同于所述第一厚度的第二厚度。

公开(公告)号：US09166039B2

公开(公告)日：2015-10-20

申请号：US14321302

申请日：2014-07-01

Applicant: Infineon Technologies AG

Inventor： Erhard Landgraf ,  Thomas Bertrams ,  Claus Dahl ,  Henning Feick ,  Andreas Pribil

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/66 ,  H01L21/033 ,  H01L21/266 ,  H01L29/40 ,  H01L29/423 ,  H01L29/739 ,  H01L29/10 ,  H01L29/45 ,  H01L29/49 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L29/7816 ,  H01L21/02107 ,  H01L21/0334 ,  H01L21/266 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66325 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7393 ,  H01L29/7835

Abstract: A transistor component includes an active transistor region arranged in the semiconductor body. And insulation region surrounds the active transistor region in the semiconductor body in a ring-shaped manner. A source zone, a drain zone, a body zone and a drift zone are disposed in the active transistor region. The source zone and the drain zone are spaced apart in a lateral direction of the semiconductor body and the body zone is arranged between the source zone and the drift zone and the drift zone is arranged between the body zone and the drain zone. A gate and field electrode is arranged over the active transistor region. The dielectric layer has a first thickness in a region near the body zone and a second thickness in a region near the drift zone.

Abstract translation: 晶体管组件包括布置在半导体本体中的有源晶体管区域。 并且绝缘区域以环形方式围绕半导体主体中的有源晶体管区域。 源极区，漏极区，体区和漂移区设置在有源晶体管区域中。 源极区域和漏极区域在半导体主体的横向方向上间隔开，并且主体区域布置在源极区域和漂移区域之间，并且漂移区域布置在体区域和排出区域之间。 栅极和场电极布置在有源晶体管区域的上方。 电介质层在体区附近具有第一厚度，在漂移区附近的区域具有第二厚度。

公开(公告)号：US20140231970A1

公开(公告)日：2014-08-21

申请号：US13771129

申请日：2013-02-20

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Jens Schneider ,  Henning Feick ,  Marcel Heller ,  Dieter Kaiser

IPC: H01L21/266 ,  G03F1/00 ,  G03F7/20 ,  H01L29/36

CPC classification number: H01L21/266 ,  C23C14/042 ,  C23C14/48 ,  G01L1/2293 ,  G03F1/00 ,  G03F1/38 ,  G03F1/56 ,  G03F7/70058 ,  H01L21/0271 ,  H01L21/2652 ,  H01L21/26586 ,  H01L27/0255 ,  H01L29/0847 ,  H01L29/36 ,  H01L29/7835 ,  H01L29/8611 ,  H01L43/065 ,  H01L43/14 ,  Y10T428/24802

Abstract: Various embodiments provide a method for processing a carrier, the method including changing the three-dimensional structure of a mask layer arranged over the carrier so that at least two mask layer regions are formed having different mask layer thicknesses; and applying an ion implantation process to the at least two mask layer regions to form at least two implanted regions in the carrier having different implantation depth profiles.

Abstract translation: 各种实施例提供一种处理载体的方法，所述方法包括改变布置在载体上的掩模层的三维结构，使得形成具有不同掩模层厚度的至少两个掩模层区域; 以及向所述至少两个掩模层区域施加离子注入工艺以在所述载体中形成具有不同注入深度分布的至少两个注入区域。

公开(公告)号：US20240097037A1

公开(公告)日：2024-03-21

申请号：US18458489

申请日：2023-08-30

Applicant: Infineon Technologies AG

Inventor： Jürgen Faul ,  Andreas Urban Bertl ,  Ewa Kowalska ,  Henning Feick

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/785 ,  H01L29/0603 ,  H01L29/0847 ,  H01L29/1033

Abstract: A transistor device includes: a semiconductor substrate having a doping concentration of a first dopant type; a highly doped source region of a second dopant type formed in a first surface of the semiconductor substrate; a first highly doped drain region of the second dopant type formed in the first surface; a gate structure arranged on the first surface and including a gate electrode formed on the first surface; and a first lightly doped region formed in the first surface and extending from the highly doped source region under the gate electrode. A channel region extends between the first lightly doped region and the highly doped drain region. The channel region has an average doping level of the first dopant type of n×10x that varies by less than 0.5×n×10X between the first lightly doped region and the highly doped drain region along the lateral direction parallel to the first surface.

公开(公告)号：US11175389B2

公开(公告)日：2021-11-16

申请号：US16747084

申请日：2020-01-20

Applicant: Infineon Technologies AG ,  pmdtechnologies ag

Inventor： Stefano Parascandola ,  Henning Feick ,  Matthias Franke ,  Dirk Offenberg ,  Jens Prima ,  Robert Roessler ,  Michael Sommer

IPC: H01L27/146 ,  G01S7/4914 ,  G01S7/4915 ,  G01S17/36 ,  H04N13/257

Abstract: An optical sensor device configured to detect a time of flight of an electromagnetic signal includes a semiconductor substrate having a main surface and a conversion region configured to convert at least a fraction of the electromagnetic signal into photo-generated charge carriers; a first control electrode formed in a trench extending from the main surface into the semiconductor substrate; a second control electrode disposed directly or indirectly on the main surface; a control circuit configured to apply a varying first potential to the first control electrode and to apply a varying second potential to the second control electrode, where the varying second potential has a fixed phase relationship to the first varying potential, to generate electric potential distributions in the conversion region to direct the photo-generated charge carriers; and a readout node arranged in the semiconductor substrate and configured to detect the directed photo-generated charge carriers.

公开(公告)号：US10804354B2

公开(公告)日：2020-10-13

申请号：US15933998

申请日：2018-03-23

Applicant: Infineon Technologies AG

Inventor： Hans Taddiken ,  Martin Bartels ,  Andrea Cattaneo ,  Henning Feick ,  Christian Kuehn ,  Anton Steltenpohl

IPC: H01L23/66 ,  H01L49/02 ,  H01L27/06 ,  H01L23/522

Abstract: A radio frequency resistor element comprises a resistive polysilicon trace, an isolation component and a semiconductor substrate. The resistive polysilicon trace is located above the isolation component. The isolation component is laterally at least partially surrounded by a modified semiconductor region located above the semiconductor substrate and having a higher charge carrier recombination rate than the semiconductor substrate.