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公开(公告)号：EP3202127B1
公开(公告)日：2020-01-08
申请号：EP15767624.8
申请日：2015-09-01
Applicant: Qualcomm Incorporated
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12.发明授权
公开(公告)号：EP2235823B1
公开(公告)日：2017-10-04
申请号：EP08867868.5
申请日：2008-12-18
Applicant: QUALCOMM Incorporated
Inventor： KESKIN, Mustafa , PEDRALI-NOY, Marzio
IPC: H03K5/13
CPC classification number: H03K5/131
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公开(公告)号：EP2277101A2
公开(公告)日：2011-01-26
申请号：EP09728094.5
申请日：2009-04-03
Applicant: QUALCOMM Incorporated
Inventor： KESKIN, Mustafa
IPC: G06F3/041
CPC classification number: G06F1/3203 , G06F1/3262 , G06F3/038 , G06F3/045
Abstract: While taking X-Y coordinate measurements to determine the location of a point of contact on a touch screen, a controller circuit drives the touch screen with a selectable voltage. Voltages output from the touch screen are converted by an ADC into the X-coordinate and Y-coordinate values. The ADC has a convertible input voltage range. If only a low touch screen detection resolution is required, then the voltage with which the touch screen is driven is made to be substantially less than the convertible input voltage range. Only a portion of the convertible input range is usable, but this is adequate for the application and power consumption is reduced. If a higher touch screen detection resolution is required, then the touch screen is driven with a higher voltage. Power consumption is increased, but more or all of the convertible input voltage range of the ADC is then usable.
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公开(公告)号：WO2023278083A2
公开(公告)日：2023-01-05
申请号：PCT/US2022/031632
申请日：2022-05-31
Applicant: QUALCOMM INCORPORATED
Inventor： LIM, Younghyun , TANG, Yiwu , PARK, Dongmin , ZHU, Yunliang , KESKIN, Mustafa , CHAO, Yue
IPC: H03K21/08 , H03K23/66 , H03L7/24 , H03L7/193 , H03L7/183 , H03K23/667 , H03L7/0995 , H03L7/191
Abstract: Aspects of the disclosure relate to a ring oscillator (RO) frequency divider configured to frequency divide an input clock by a programmable divider ratio to generate an output clock. In this regard, the RO frequency divider receives the input clock, enables each of a ring of N cascaded inverter stages substantially one at a time in response to the input clock; and outputs a second clock from an output of one of the ring of N cascaded inverter stages. In one aspect, each stage includes a p-channel metal oxide semiconductor field effect transistor (PMOS FET) coupled in series with an n-channel metal oxide semiconductor field effect transistor (NMOS FET). In another, each stage includes two PMOS FETs and an NMOS FET.
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公开(公告)号：WO2017222737A1
公开(公告)日：2017-12-28
申请号：PCT/US2017/034321
申请日：2017-05-24
Applicant: QUALCOMM INCORPORATED
Inventor： KESKIN, Mustafa , GILMORE, Robert , SEZAN, Muhammed
CPC classification number: H04L43/065 , H04L43/16 , H04M2250/12 , H04W4/70 , H04W24/08 , H04W52/0251 , H04W52/0254 , H04W52/0277 , H04W52/028 , Y02D70/00 , Y02D70/1224 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/162 , Y02D70/164 , Y02D70/26
Abstract: The present application relates to acquiring sensor data at a user equipment (UE). The described aspects include receiving a first input representing a request to activate one or more sensors. The described aspects further include activating, by a controller at the UE, the one or more sensors in response to receiving the first input. Further, the described aspects include receiving the sensor data from each of the one or more sensors in response to activating the one or more sensors. The described aspects include determining whether a sensor adjustment condition has been satisfied. Additionally, the described aspects include adjusting an acquisition characteristic of the one or more sensors based on determining that the sensor adjustment condition has been satisfied.
Abstract translation: 本申请涉及在用户设备（UE）处获取传感器数据。 所描述的方面包括接收表示激活一个或多个传感器的请求的第一输入。 所描述的方面还包括响应于接收到第一输入，由UE处的控制器激活一个或多个传感器。 此外，所描述的方面包括响应于激活一个或多个传感器而从一个或多个传感器中的每一个接收传感器数据。 所描述的方面包括确定是否已经满足传感器调整条件。 另外，所描述的方面包括基于确定传感器调整条件已被满足来调整一个或多个传感器的获取特性。
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Patent Agency Ranking
公开(公告)号：WO2017030694A1
公开(公告)日：2017-02-23
申请号：PCT/US2016/042264
申请日：2016-07-14
Applicant: QUALCOMM INCORPORATED
Inventor： KESKIN, Mustafa , DIKBAS, Salih
CPC classification number: H04N5/23296 , G03B5/00 , G03B2205/0046 , G06T7/80
Abstract: A method, an apparatus, and a computer program product for a camera zoom function are provided. The method includes associating a camera zoom with at least one sensor, detecting a physical characteristic of the camera with the at least one sensor, and adjusting the camera zoom based on the detected physical characteristic of the camera. The detecting the physical characteristic and the adjusting the camera zoom are continuous. An apparatus is provided and includes a camera, a memory, and at least one processor coupled to the memory. The at least one processor is configured to associate a camera zoom with at least one sensor, detect a physical characteristic of the camera with the at least one sensor, and adjust the camera zoom based on the detected physical characteristic of the camera. The detecting the physical characteristic and the adjusting the camera zoom are continuous.
Abstract translation: 提供了一种用于相机变焦功能的方法，装置和计算机程序产品。 该方法包括将摄像机变焦与至少一个传感器相关联，检测摄像机与至少一个传感器的物理特性，以及基于检测到的相机的物理特性来调整摄像机变焦。 检测物理特性和调整摄像机变焦是连续的。 提供了一种装置，并且包括相机，存储器和耦合到存储器的至少一个处理器。 所述至少一个处理器被配置为将摄像机变焦与至少一个传感器相关联，利用所述至少一个传感器检测所述摄像机的物理特性，并且基于检测到的所述摄像机的物理特性来调整所述摄像机变焦。 检测物理特性和调整摄像机变焦是连续的。
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公开(公告)号：WO2016053556A1
公开(公告)日：2016-04-07
申请号：PCT/US2015/047989
申请日：2015-09-01
Applicant: QUALCOMM INCORPORATED
Inventor： KESKIN, Mustafa , JAFFEE, James Ian , BAZARJANI, Seyfollah Seyfollahi , WALKER, Brett Christopher
CPC classification number: H04R1/1041 , G06F13/385 , H04M1/6058 , H04M1/72527 , H04R1/1033 , H04R2420/03 , H04R2420/05 , H04R2420/09
Abstract: A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.
Abstract translation: 用户设备确定连接到其耳机插孔的设备是否是音频附件设备。 如果连接到耳机插孔的设备是音频附件，则用户设备将耳机插孔的一个或多个引脚连接到音频编解码器。 如果插入耳机插孔的设备不是音频附件设备，则用户设备将耳机插孔的一个或多个引脚连接到备用电路。 用户设备然后通过备用电路确定附件设备的电气操作参数要求，并通过耳机插孔从备用电路提供所需的操作参数到附件设备。 替代电路可以包括可调电压调节器和/或可调电流调节器，并且所需的操作参数可以是电压源和电流源中的一个或多个。
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公开(公告)号：WO2009042615A1
公开(公告)日：2009-04-02
申请号：PCT/US2008/077404
申请日：2008-09-23
Applicant: QUALCOMM INCORPORATED , KESKIN, Mustafa , PEDRALI-NOY, Marzio
Inventor： KESKIN, Mustafa , PEDRALI-NOY, Marzio
IPC: H03K3/037
CPC classification number: H03K3/037
Abstract: Delay circuits capable of providing delays closely matching propagation delays of synchronous circuits are described. In one design, an apparatus includes a synchronous circuit and a delay circuit. The synchronous circuit includes a forward path from a data input to a data output. The synchronous circuit receives input data and provides output data with a propagation delay. The delay circuit receives an input signal and provides a delayed input signal having a delay matching the propagation delay of the synchronous circuit. The delay circuit includes at least two logic gates in the forward path of the synchronous circuit. The synchronous and delay circuits may be implemented based on the same or similar circuit architecture. The delay circuit may be based on a replica of the synchronous circuit, with the replica having feedback loops broken and clock input coupled to appropriate logic value to always enable the delay circuit.
Abstract translation: 描述了能够提供与同步电路的传播延迟紧密匹配的延迟的延迟电路。 在一种设计中，一种装置包括同步电路和延迟电路。 同步电路包括从数据输入到数据输出的正向路径。 同步电路接收输入数据并提供具有传播延迟的输出数据。 延迟电路接收输入信号并提供具有与同步电路的传播延迟匹配的延迟的延迟输入信号。 延迟电路在同步电路的正向路径中包括至少两个逻辑门。 同步和延迟电路可以基于相同或相似的电路架构来实现。 延迟电路可以基于同步电路的副本，其中复制品具有反馈回路断开，并且时钟输入耦合到适当的逻辑值以总是使能延迟电路。
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公开(公告)号：WO2006138205A1
公开(公告)日：2006-12-28
申请号：PCT/US2006/022727
申请日：2006-06-09
Applicant: QUALCOMM INCORPORATED , KESKIN, Mustafa
Inventor： KESKIN, Mustafa
IPC: H03M1/06
CPC classification number: H03M1/0604 , H03M1/466
Abstract: An error correction circuit for use with an analog-to-digital converter (ADC) comprising correction capacitance means and switching means coupled to the correction capacitance means. The switching means being coupled to ground and to a plurality of reference voltages and being arranged to couple a bottom plate of the correction capacitance means to ground during a sample phase of the ADC and to one of a plurality of reference voltages during a hold phase of the ADC.
Abstract translation: 一种与模数转换器（ADC）一起使用的纠错电路，包括校正电容装置和耦合到校正电容装置的开关装置。 开关装置被耦合到接地和多个参考电压，并且被布置成在ADC的采样阶段期间将校正电容装置的底板耦合到地，并在多个参考电压的保持阶段期间耦合到多个参考电压中的一个 ADC。
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公开(公告)号：WO2023049586A1
公开(公告)日：2023-03-30
申请号：PCT/US2022/075343
申请日：2022-08-23
Applicant: QUALCOMM INCORPORATED
Inventor： TSENG, Yi-Hung , PEDRALI-NOY, Marzio , PERSICO, Charles James , KESKIN, Mustafa
IPC: H04B1/40
Abstract: An apparatus is disclosed for making circuitry with passive fundamental components more robust. In example implementations, an apparatus includes at least one passive fundamental component and at least one redundant passive fundamental component. The apparatus also includes fault tolerant circuitry coupled to the at least one passive fundamental component and the at least one redundant passive fundamental component. The fault tolerant circuitry includes fault detection circuitry configured to detect a fault of the at least one passive fundamental component. The fault tolerant circuitry also includes component repair circuitry configured to disconnect the at least one passive fundamental component based on the fault.
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