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    SYSTEM AND METHOD OF DETERMINING AN OSCILLATOR GAIN
    4.
    发明申请
    SYSTEM AND METHOD OF DETERMINING AN OSCILLATOR GAIN 审中-公开
    确定振荡器增益的系统和方法

    公开(公告)号：WO2014018893A1

    公开(公告)日：2014-01-30

    申请号：PCT/US2013/052331

    申请日：2013-07-26

    Applicant: QUALCOMM INCORPORATED

    Inventor： TANG, Yiwu ,  ZHU, Yunliang ,  NARATHONG, Chiewcharn ,  RONG, Sujiang

    IPC: H03L7/07

    CPC classification number: H03L7/099 ,  G01R31/2832 ,  H03B21/01 ,  H03L7/07

    Abstract: A method includes generating a first signal based on a difference between a first frequency of a first voltage controlled oscillator (VCO) and a second frequency of a second VCO. The method further includes determining a gain of the first VCO at least partially based on the first signal.

    Abstract translation: 一种方法包括基于第一压控振荡器（VCO）的第一频率和第二VCO的第二频率之间的差产生第一信号。 该方法还包括至少部分地基于第一信号来确定第一VCO的增益。

    FREQUENCY DIVIDER FUNCTIONALITY DETECTION AND ADJUSTMENT
    5.
    发明申请
    FREQUENCY DIVIDER FUNCTIONALITY DETECTION AND ADJUSTMENT 审中-公开

    公开(公告)号：WO2023038752A1

    公开(公告)日：2023-03-16

    申请号：PCT/US2022/039909

    申请日：2022-08-10

    Applicant: QUALCOMM INCORPORATED

    Inventor： HAO, Shilei ,  TANG, Yiwu ,  ZHU, Yunliang

    IPC: H03L7/183 ,  H03K5/00

    Abstract: A frequency divider functionality detection and adjustment circuit includes an auxiliary voltage controlled oscillator (VCO) coupled to a first multiplexer (MUX), a programmable divider coupled to the first MUX, a second MUX coupled to the programmable divider, a counter coupled to the second MUX, and a controller coupled to the counter, the controller configured to adjust a supply voltage provided to the programmable divider based on a measured divide ratio, NMEAS.

    PRESCALER FOR A FREQUENCY DIVIDER
    6.
    发明申请
    PRESCALER FOR A FREQUENCY DIVIDER 审中-公开

    公开(公告)号：WO2023014459A2

    公开(公告)日：2023-02-09

    申请号：PCT/US2022/036192

    申请日：2022-07-06

    Applicant: QUALCOMM INCORPORATED

    Inventor： HAO, Shilei ,  ZHU, Yunliang ,  TANG, Yiwu ,  PARK, Dongmin

    IPC: H03K21/10 ,  H03K23/40 ,  H03K23/44 ,  H03L7/193 ,  H03K3/356121

    Abstract: A hybrid true single-phase clock (H-TSPC) circuit includes a first logic circuit comprising non-ratio (NR) logic, a first mode switching device coupled to an output of the first logic circuit, a second logic circuit comprising ratio (R) logic, the second logic circuit configured to receive an output of the first logic circuit, a second mode switching device coupled to an output of the second logic circuit, a third logic circuit comprising non-ratio (NR) logic, the third logic circuit configured to receive an output of the second logic circuit, and a third mode switching device coupled to an output of the third logic circuit, wherein the first logic circuit, second logic circuit, and third logic circuit are configured in a ring.

    MULTIMODE FREQUENCY MULTIPLIER
    7.
    发明申请
    MULTIMODE FREQUENCY MULTIPLIER 审中-公开

    公开(公告)号：WO2022226462A2

    公开(公告)日：2022-10-27

    申请号：PCT/US2022/071417

    申请日：2022-03-29

    Applicant: QUALCOMM INCORPORATED

    Inventor： ZHANG, Yan ,  ZHU, Yunliang ,  TANG, Yiwu

    IPC: H03B19/14 ,  H03K3/03 ,  H03B19/10 ,  H03B5/1221 ,  H03D7/14 ,  H03K3/0315 ,  H03K5/00006 ,  H04B1/0483 ,  H04L27/362

    Abstract: This disclosure describes apparatuses, methods, and techniques for implementing a multimode frequency multiplier. In example implementations, an apparatus for generating a frequency includes a multimode frequency multiplier. The multimode frequency multiplier includes a multiphase generator and a reconfigurable frequency multiplier. The multiphase generator is configured to produce a first signal including multiple phase components and having a first frequency. The reconfigurable frequency multiplier is coupled in series with the multiphase generator. The reconfigurable frequency multiplier is configured to produce a second signal based on the first signal and having a second frequency that is a multiple of the first frequency.

    SYSTEM AND METHOD OF DETERMINING AN OSCILLATOR GAIN
    10.
    发明公开
    SYSTEM AND METHOD OF DETERMINING AN OSCILLATOR GAIN 审中-公开
    系统在VERFAHREN ZUR BESTIMMUNG EINEROSZILLATORVERSTÄRKUNG

    公开(公告)号：EP2878081A1

    公开(公告)日：2015-06-03

    申请号：EP13745547.3

    申请日：2013-07-26

    Applicant: Qualcomm Incorporated

    Inventor： TANG, Yiwu ,  ZHU, Yunliang ,  NARATHONG, Chiewcharn ,  RONG, Sujiang

    IPC: H03L7/07

    CPC classification number: H03L7/099 ,  G01R31/2832 ,  H03B21/01 ,  H03L7/07

    Abstract: A method includes generating a first signal based on a difference between a first frequency of a first voltage controlled oscillator (VCO) and a second frequency of a second VCO. The method further includes determining a gain of the first VCO at least partially based on the first signal.

    Abstract translation: 一种方法包括基于第一压控振荡器（VCO）的第一频率和第二VCO的第二频率之间的差产生第一信号。 该方法还包括至少部分地基于第一信号来确定第一VCO的增益。

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