公开(公告)号：US09969610B2

公开(公告)日：2018-05-15

申请号：US15416206

申请日：2017-01-26

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: H01L31/0203 ,  B81B7/00 ,  B81C1/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

公开(公告)号：US09771258B2

公开(公告)日：2017-09-26

申请号：US14748482

申请日：2015-06-24

Applicant: Raytheon Company

Inventor： Buu Q. Diep ,  Adam M. Kennedy ,  Thomas Allan Kocian ,  Mark Lamb

IPC: H01L23/498 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81B7/0058 ,  B81B7/0041 ,  B81B2201/0207 ,  B81B2201/04 ,  B81C1/00269 ,  B81C1/00317 ,  B81C2203/0109 ,  B81C2203/0118 ,  B81C2203/0145 ,  B81C2203/019

Abstract: A microelectromechanical systems (MEMS) package includes a substrate extending between a first pair of outer edges to define a length and a second pair of outer edges to define a width. A seal ring assembly is disposed on the substrate and includes at least one seal ring creating a first boundary point adjacent to at least one MEMS device and a second boundary point adjacent at least one of the outer edges. The package further includes a window lid on the seal ring assembly to define a seal gap containing the at least one MEMS device. The seal ring assembly anchors the window lid to the substrate at the second boundary point such that deflection of the window lid into the seal gap is reduced.

公开(公告)号：US09427776B2

公开(公告)日：2016-08-30

申请号：US13688714

申请日：2012-11-29

Applicant: Raytheon Company

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Stephen H. Black ,  Thomas A. Kocian ,  Adam M. Kennedy

IPC: B05D5/06 ,  B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00325 ,  B05D5/061 ,  B81B7/0067 ,  B81B2201/0207 ,  B81C2203/0118

Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.

Abstract translation: 提供了通过盖晶片的抗反射涂层引起的减少晶片弓的方法。 该方法可以利用其中具有至少一个开口的荫罩，其位于帽晶片中的相对凹陷区域。 该方法还可以包括将至少一层抗反射涂层材料通过荫罩沉积到盖晶片的平面侧上，以在平面侧上提供不连续的涂层。

公开(公告)号：US20150321905A1

公开(公告)日：2015-11-12

申请号：US14270945

申请日：2014-05-06

Applicant: Raytheon Company

Inventor： Roland W. Gooch ,  Stephen H. Black ,  Thomas A. Kocian ,  Adam M. Kennedy ,  Buu Q. Diep

IPC: B81B7/00 ,  H01L37/00

CPC classification number: B81B7/0067 ,  B81B7/0035 ,  B81B2201/0207 ,  B81C1/00317 ,  G01J5/045 ,  G01J5/08 ,  G01J5/20 ,  H01L37/00

Abstract: A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when. the cover wafer is bonded to the device wafer.

Abstract translation: 一种用于检测具有预定波长的电磁辐射的结构。 该结构包括具有传感元件的器件晶片，其响应于电磁辐射而设置在器件晶片的表面的预定区域上。 提供了覆盖晶片，其具有对电磁辐射透明的区域，以将电磁辐射穿过透明区域传递到感测元件的表面上。 提供了一种键间隔结构，用于当从盖玻片的透明区域的相对表面以小于预定波长的一小部分的距离来支撑感测元件的表面时。 盖晶片被结合到器件晶片。

公开(公告)号：US09708181B2

公开(公告)日：2017-07-18

申请号：US15048106

申请日：2016-02-19

Applicant: Raytheon Company

Inventor： Adam M. Kennedy ,  Buu Q. Diep ,  Stephen H. Black ,  Tse E. Wong ,  Thomas Allan Kocian ,  Gregory D. Tracy

IPC: H01L21/50 ,  B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00333 ,  B81B7/0048 ,  B81B7/0051 ,  B81B2201/0207 ,  B81C1/00825 ,  B81C2203/035

Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

公开(公告)号：US20170011977A1

公开(公告)日：2017-01-12

申请号：US15270145

申请日：2016-09-20

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas A. Kocian

IPC: H01L23/10 ,  H01L27/146 ,  H01L23/26 ,  B81B7/00 ,  B81C1/00

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

Abstract translation: 电子装置及其制造方法。 一种或多种方法可以包括提供具有空腔和围绕空腔的表面的盖晶片和具有检测器装置和参考装置的装置晶片。 在某些实例中，可以将钛材料的阻焊层沉积到盖晶片的表面上。 可以进一步激活钛材料的阻焊层作为吸气剂。 在各种示例中，盖晶片和器件晶片可以使用焊料接合在一起，并且钛材料的阻焊层可以防止焊料接触盖晶片的表面。

公开(公告)号：US09520332B2

公开(公告)日：2016-12-13

申请号：US14736042

申请日：2015-06-10

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Adam M. Kennedy ,  Stephen H. Black ,  Thomas A. Kocian

IPC: H01L23/48 ,  H01L23/20 ,  H01L21/00 ,  H01L21/30 ,  H01L23/10 ,  H01L23/498 ,  H01L21/768 ,  B81B7/00 ,  H01L23/26 ,  B81C1/00 ,  H01L21/52 ,  H01L27/146

CPC classification number: H01L23/10 ,  B81B7/0038 ,  B81B2201/0207 ,  B81C1/00269 ,  B81C2203/035 ,  H01L21/52 ,  H01L21/76841 ,  H01L23/26 ,  H01L23/49866 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/16 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.

公开(公告)号：US20160340179A1

公开(公告)日：2016-11-24

申请号：US15227181

申请日：2016-08-03

Applicant: RAYTHEON COMPANY

Inventor： Roland W. Gooch ,  Buu Q. Diep ,  Stephen H. Black ,  Thomas A. Kocian ,  Adam M. Kennedy

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00325 ,  B05D5/061 ,  B81B7/0067 ,  B81B2201/0207 ,  B81C2203/0118

Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.

Abstract translation: 提供了通过盖晶片的抗反射涂层引起的减少晶片弓的方法。 该方法可以利用其中具有至少一个开口的荫罩，其位于帽晶片中的相对凹陷区域。 该方法还可以包括将至少一层抗反射涂层材料通过荫罩沉积到盖晶片的平面侧上，以在平面侧上提供不连续的涂层。

公开(公告)号：US20160167959A1

公开(公告)日：2016-06-16

申请号：US15048106

申请日：2016-02-19

Applicant: Raytheon Company

Inventor： Adam M. Kennedy ,  Buu Q. Diep ,  Stephen H. Black ,  Tse E. Wong ,  Thomas Allan Kocian ,  Gregory D. Tracy

IPC: B81C1/00

CPC classification number: B81C1/00333 ,  B81B7/0048 ,  B81B7/0051 ,  B81B2201/0207 ,  B81C1/00825 ,  B81C2203/035

Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

Abstract translation: 密封包装，其具有设置在晶片结构上的装置和骨架到装置晶片上的盖结构。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。

公开(公告)号：US09334154B2

公开(公告)日：2016-05-10

申请号：US14456476

申请日：2014-08-11

Applicant: Raytheon Company

Inventor： Adam M. Kennedy ,  Buu Q. Diep ,  Stephen H. Black ,  Tse E. Wong ,  Thomas Allan Kocian ,  Gregory D. Tracy

IPC: H01L23/552 ,  B81B7/00

CPC classification number: B81C1/00333 ,  B81B7/0048 ,  B81B7/0051 ,  B81B2201/0207 ,  B81C1/00825 ,  B81C2203/035

Abstract: A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

Abstract translation: 密封包装，其具有设置在晶片结构上的装置和骨架到装置晶片上的盖结构。 器件晶片包括：衬底; 设置在所述装置周围的基板的表面部分上的金属环和设置在所述金属环上的接合材料。 金属环横向延伸超过接合材料的内边缘和外边缘中的至少一个。 金属环的第一层包括具有比衬底的表面部分更高的延展性的应力消除缓冲层，并且具有大于接合材料的宽度的宽度。 金属环横向延伸超出接合材料的内边缘和外边缘中的至少一个。 应力消除缓冲层的热膨胀系数大于衬底表面部分的膨胀系数，小于接合材料的膨胀系数。