Abstract:
PROBLEM TO BE SOLVED: To simplify the manufacture of a high power single transverse mode surface emission semiconductor laser. SOLUTION: A surface emission semiconductor laser is provided with, on the same substrate, a current injection type light emitting part 1 having a gain and a DBR (Distributed Bragg Reflector) part 2 comprising a two-dimensional photonic crystal having no gain. The DBR part 2 is disposed at a position on the substrate where it guides and couples light waves from the light emitting part 1 in the shape of a ring surrounding the light emitting part 1. One electrode thereof for current injection into the light emitting part is deposited in a limited manner on at least a part on the light emitting part excepting at least an external circumferential part on the two-dimensional photonic crystal DBR part. The light emitting part and the DBR part are disposed at different positions planarly. Hereby, the light emitting part 1 and the DBR part 2 can be formed on the same substrate, so that any inconvenience of a manufacturing treatment thereof caused by the formation thereof on different substrates is avoided. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract:
PROBLEM TO BE SOLVED: To provide a surface emitting laser capable of decreasing a threshold current with a simple structure, an electronic apparatus having the surface emitting laser, and to provide a method for manufacturing the surface emitting laser. SOLUTION: A suppression region is provided to suppress diffusion of current in the outside of a first region so as to surround the first region, to which the current is fed along an optical resonant direction from the upper side of a semiconductor layer. Consequently, the current flown into the first region hardly leaks out thereof, thereby acting upon the oscillation of the laser beam for sure and reducing the threshold current. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To improve the recording ability of a magnetic head coped with the high recording density. SOLUTION: This magnetic head having such a structure that a recording gap 16 is held between a low layer core 11 and an upper layer core 18 constituted of a tip recording core 18 corresponded to the specified recording width and a back yoke 19, is furnished with an auxiliary magnetic pole 20 between the tip recording core 18 and the back yoke 19.
Abstract:
PROBLEM TO BE SOLVED: To strike a balance between the reduction in thickness of a memory layer and the suppression of variations among elements, in a resistance change type semiconductor memory device. SOLUTION: Resistance change type memory cells are arranged in an array. Each of the memory cells includes a first electrode 15 formed on a semiconductor substrate 10, an ion source layer 17 formed on an upper layer of the first electrode, and a second electrode 19 formed on an upper layer of the ion source layer, and a resistance change type memory layer 16 is formed on an interfacial surface between the first electrode and the ion source layer by oxidization of the surface of the first electrode or the surface of the ion source layer. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a memory element which has a larger number of times for repeatable operation than conventional ones, and exhibits a stable resistance varying switching characteristic. SOLUTION: The memory element 1A has a memory layer 17 and an upper electrode 18 on a lower electrode 14 and an insulating film 15. The memory layer 17 comprises the laminating-layer structure of a high-resistance layer and an ion-source layer. The high-resistance layer is formed out of the oxide film of Gd (gadolinium), and the ion-source layer contains such metal elements as Cu (copper), Zr (zirconium), Al (aluminum), and so forth together with such chalcogenide elements as S (sulfur), Se (selenium), Te (tellurium), and so forth. The insulation film 15 has a recessed portion 16, and the lower electrode 14 contacts with the memory layer 17 in the recessed portion 16. The depth of the recessed portion 16 is not smaller than 2 nm and not larger than 20 nm preferably, and is not smaller than 5 nm and not larger than 16 nm more preferably. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a memory cell which applies a voltage required to change it into a high resistance state or a low resistance state, to a variable resistance element by suitably controlling the resistance value. SOLUTION: A memory device 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The memory device 10 has an inverse nonlinear current-voltage characteristic with respect to the nonlinear current-voltage characteristic of the MOS transistor 30, and it is changed into the high resistance state or the low resistance state according to the polarity of the applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic common to the nonlinear current-voltage characteristic of the memory device 10. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a non-volatile memory device having non-volatile characteristic and configuration easy to manufacture and control its property. SOLUTION: A memory layer 3 is arranged between two electrodes 1 and 2. The memory layer 3 constitutes a memory element 5 with composition containing one metallic element chosen from Cu, Ag and Zn, one chalcogen element chosen from Te, S and Se, and Si or Ge. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a reliable storage element stably holding information stored by utilizing a change in the resistance state of a thin film for storage included in a storage layer. SOLUTION: The storage layer 6 is sandwiched between first and second electrodes 1, 5. In the storage layer 6, an insulating layer 2 of which thermal conductivity is not less than 15 W/mK, a thin film 3 for storage made of rare earth element oxide, and an ion source layer 4 containing Cu, Ag, or Zn to be ionized are laminated. In the storage element 10, the storage layer 6 is connected to one electrode 1 through an opening formed in the insulating layer 2. COPYRIGHT: (C)2008,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a surface emitting laser which has a large aperture, is capable of outputting a high power stably in a single mode, and reducing a threshold current, and to provide an electronic apparatus equipped with the same and a method of manufacturing the same. SOLUTION: A second region whose effective refractive index is slightly different from the refractive index of a first region is formed so as to surround the first region in the direction of optical resonance, and an electrode used for injecting a current into the first region and an insulator for stopping a current from entering the second region are formed. By this setup, laser rays of a higher order in a lateral mode are never guided through the first region, and laser rays of a single mode are trapped and guided in the first region, so that the surface emitting laser is capable of outputting a high power stably in a single mode, and reducing a threshold current even though laser rays of a lateral mode are emitted as a laser beam of a high power due to a large aperture. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To equalize the etching rates of a laminated part of insulating layer/ metal layer and a part in which the insulating layer does not substantially exist, in a method of manufacturing the magneto-resistive(MR) element to simultaneously etch both parts. SOLUTION: In a method for manufacturing comprises a step for patterning a laminated layer with an anti-ferromagnetic layer 4, a fixed layer 3, and a spacer layer 5, a step for embedding an insulating layer 13 to the surrounding of a patterned laminated layer, a step for forming a film double used both as a free layer and a flux guide layer over this insulating layer 13 and the patterned laminated layer, and a step for simultaneously patterning by the beam etching the flux guide layer and the laminated layer to form a laminated structure part 6, by selecting incident angle θ of the etching beam to the normal line of an etching plane at 100 deg.