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    DATA TRANSMITTER
    12.
    发明专利
    DATA TRANSMITTER 失效

    公开(公告)号：JPH0936852A

    公开(公告)日：1997-02-07

    申请号：JP18378395

    申请日：1995-07-20

    Applicant: SONY CORP

    Inventor： TAMURA YOSHIHIRO ,  CHIBA YOSHIYUKI

    IPC: H04L9/12 ,  H04J3/07

    Abstract: PROBLEM TO BE SOLVED: To prevent a linear spectrum occurring in the jitter and the modulation wave of a reproduced clock in a decoder and to reduce a circuit scale by ciphering data outputted from a stuffing circuit and stuffing data. SOLUTION: Stuffing data is added to data inputted by the stuffing circuit 10 for matching data quantity to be transmitted with a prescribed transmission bit rate. Data outputted from the stuffing circuit 10 and stuffing data are ciphered by a ciphering bit scrambling circuit 11. Output is inputted to a data system outputted from the ciphering bit scrambling circuit 11 to a bit scrambling circuit for energy dispersion 12 having a random system with a short period with respect to a data system outputted from the ciphering bit scrambling circuit 11. Thus, the linear spectrum occurring in the jitter and the modulation wave of the reproduced clock in a decoder is prevented and the circuit scale can be reduced.

    13.
    发明专利
    失效

    公开(公告)号：JPH05304642A

    公开(公告)日：1993-11-16

    申请号：JP10688392

    申请日：1992-04-24

    Applicant: SONY CORP

    Inventor： TAMURA YOSHIHIRO ,  SETO HIROAKI

    IPC: H04N5/60

    Abstract: PURPOSE:To synchronize a picture with a voice and to reduce a sense of incongruity due to a mismatching between the picture and the voice, even when the delay of the picture is generated due to the change of the capacity of a buffer memory or a transmission rate. CONSTITUTION:An encoding processing is operated to the picture data by a high efficient encoding circuit 22 and a variable length encoding circuit 23, and the picture data are temporarily stored in a buffer memory 24, and outputted. And also, the encoding processing is operated to the voice data by a voice encoding circuit 12 in a different system. Then, a variable delay line 14 is provided in the middle of the signal processing path of the voice data, and the voice data only in amounts corresponding to the delay amounts of the picture data due to the buffer memory 24 are delayed by the variable delay line 14.

    Information processing method, information processing system, information processing apparatus, and program
    14.
    发明专利
    Information processing method, information processing system, information processing apparatus, and program 审中-公开
    信息处理方法，信息处理系统，信息处理装置和程序

    公开(公告)号：JP2013061846A

    公开(公告)日：2013-04-04

    申请号：JP2011200442

    申请日：2011-09-14

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： YOSHIDA KYOSUKE ,  TAMURA YOSHIHIRO ,  OGATA ICHIRO ,  TAKAGI YOSHINORI ,  HIBI TAKAFUMI ,  IZAKI DAISUKE

    IPC: G06F12/00 ,  G06F3/06 ,  H04N5/91

    CPC classification number: G06F3/0613 ,  G06F3/0656 ,  G06F3/0685 ,  G06F12/0862

    Abstract: PROBLEM TO BE SOLVED: To provide an information processing method, information processing system, information processing apparatus, and program for realizing a storage system that enables efficient access.SOLUTION: An information processing method includes: grouping temporarily consecutive data into a plurality of groups on the basis of a reference defined in advance and storing the grouped data; reading target data being a target of the request from a first group that includes the target data in response to an access request from an external apparatus, and outputting the read target data to the external apparatus; and reading at least part of data from a second group different from the first group as read-ahead target data in response to the reading of the target data.

    Abstract translation: 要解决的问题：提供一种信息处理方法，信息处理系统，信息处理装置和用于实现能够有效访问的存储系统的程序。 解决方案：信息处理方法包括：基于预先定义的参考，将临时连续数据分组成多个组并存储分组数据; 响应于来自外部设备的访问请求，从包括目标数据的第一组读取作为请求的目标的目标数据，并将读取的目标数据输出到外部设备; 以及响应于所述目标数据的读取，从与所述第一组不同的第二组中读取数据的至少一部分作为预读目标数据。 版权所有（C）2013，JPO＆INPIT

    16.
    发明专利
    失效

    公开(公告)号：JPH05291831A

    公开(公告)日：1993-11-05

    申请号：JP8563592

    申请日：1992-04-07

    Applicant: SONY CORP

    Inventor： IKEDA YASUNARI ,  TAMURA YOSHIHIRO

    IPC: H03C1/54 ,  H04N5/40 ,  H04N7/20

    Abstract: PURPOSE:To extend a break point frequency of a frequency characteristic toward a lower limit by detecting a DC component of an output of a drive amplifier and comparing it with a reference value so as to apply DC feedback to the drive amplifier. CONSTITUTION:The circuit is provided with a drive amplifier 5 receiving a modulation signal, a modulator 1 receiving the output of the drive amplifier 5, a comparator 7 detecting a DC component based on outputs of the drive amplifier 5 and of the modulator 1 receiving the output of the drive amplifier 5 and comparing the component with a reference value to obtain a comparison use DC current. Then a DC component in a modulation signal V1 detected by a low pass filter (LPF) 6 is subtracted from a reference voltage corresponding to an offset of the modulator 1 at the comparator 7 and a difference DC component is fed back to the drive amplifier 5, in which the offset component caused in advance in the modulator 1 is similarly subtracted and a modulation signal is fed to the modulator 1. Thus, the low frequency component included in the modulation signal V1 is not attenuated nor eliminated.

    Information processing method, information processing system, information processing apparatus, and program
    17.
    发明专利
    Information processing method, information processing system, information processing apparatus, and program 审中-公开
    信息处理方法，信息处理系统，信息处理装置和程序

    公开(公告)号：JP2013120463A

    公开(公告)日：2013-06-17

    申请号：JP2011267511

    申请日：2011-12-07

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： HIBI TAKAFUMI ,  IZAKI DAISUKE ,  YOSHIDA KYOSUKE ,  TAMURA YOSHIHIRO ,  TAKAGI YOSHINORI

    IPC: G06F3/06 ,  G06F12/00

    Abstract: PROBLEM TO BE SOLVED: To provide an information processing method, an information processing system, an information processing apparatus, and a program for achieving a high quality storage system using file-level mirroring.SOLUTION: An information processing method includes transferring a first file access to a first storage capable of storing a file to, as a second file access, a second storage for storing the replication of the file stored in the first storage. The consistency between a first access result of the first storage to the first file access and a second access result of the second storage to the transferred second file access is determined.

    Abstract translation: 要解决的问题：提供一种使用文件级镜像实现高质量存储系统的信息处理方法，信息处理系统，信息处理装置和程序。 解决方案：一种信息处理方法，包括将能够存储文件的第一存储器的第一文件访问传送到作为第二文件访问的第二存储器，用于存储存储在第一存储器中的文件的复制。 确定第一存储器对第一文件访问的第一访问结果与第二存储器对传送的第二文件访问的第二访问结果之间的一致性。 版权所有（C）2013，JPO＆INPIT

    ACCUMULATION VALUE CONTROLLER FOR BUFFER MEMORY
    18.
    发明专利
    ACCUMULATION VALUE CONTROLLER FOR BUFFER MEMORY 失效

    公开(公告)号：JPH0553761A

    公开(公告)日：1993-03-05

    申请号：JP24274791

    申请日：1991-08-28

    Applicant: SONY CORP

    Inventor： TAMURA YOSHIHIRO ,  IKEDA YASUNARI

    IPC: G06F5/14 ,  G06F5/06 ,  G06F13/38 ,  G11C7/00 ,  H04N1/41

    Abstract: PURPOSE:To easily obtain the accumulation value of a buffer memory and also to easily secure the synchronization. CONSTITUTION:This memory is provided write a with counter register 10 which is provided to hold the write value to a buffer memory 18 together with a read counter register 16 which holds the read value to the memory 18, and a subtractor 11 which performs the subtraction of the output of both registers 10 and 16 respectively, and the registers 12, 13 and 15 which are added to hold the output data on one of both registers 10 and 16 with the clock of the other register together with a coincidence circuit 14 which checks the coincidence between the data stored and unstored in the registers 12, 13 and 15.

    PICTURE PROCESSING UNIT
    19.
    发明专利
    PICTURE PROCESSING UNIT 失效

    公开(公告)号：JPH02257781A

    公开(公告)日：1990-10-18

    申请号：JP7953589

    申请日：1989-03-30

    Applicant: SONY CORP

    Inventor： TAMURA YOSHIHIRO ,  KITAMURA YOSHIO ,  KOYANAGI HIDEKI ,  NAGAI MASATO

    IPC: H04N5/907 ,  H04N7/14 ,  H04N7/24 ,  H04N19/00 ,  H04N19/102 ,  H04N19/134 ,  H04N19/169 ,  H04N19/423 ,  H04N19/625 ,  H04N19/80 ,  H04N19/85

    Abstract: PURPOSE:To prevent the deterioration in picture quality of a displayed picture with low power consumption and simple constitution by placing priority over picture data readout or write when the readout or write of the picture data is in contention with other readout and compensating other readout operation with a readout picture data before one period. CONSTITUTION:When a readout or write of a picture data DG by a picture data processing circuit 57 takes place at the same time the picture data DG is read by the picture data readout circuit 44, the operation of the picture data readout circuit 44 is subject to stop control and a picture data DGO read by the picture data readout circuit 44 is replaced with the picture data DGO held and read by a latch circuit 46 before one period. Thus, the picture data DGO read by the picture data readout circuit 44 is supplemented by the picture data DGO read before one period. Thus, the deterioration of the display picture is avoided by reducing power consumption with simple constitution.

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