公开(公告)号：DE60317735T2

公开(公告)日：2008-10-30

申请号：DE60317735

申请日：2003-06-12

Applicant: ST MICROELECTRONICS SA

Inventor： MOREAUX CHRISTOPHE ,  ANGUILLE CLAUDE

IPC: G06K17/00 ,  G07F7/10 ,  G09C1/00 ,  H04L9/32

公开(公告)号：DE602005009439D1

公开(公告)日：2008-10-16

申请号：DE602005009439

申请日：2005-07-05

Applicant: PROTON WORLD INT NV ,  ST MICROELECTRONICS SA

Inventor： DAEMEN JOAN ,  GUILLEMIN PIERRE ,  ANGUILLE CLAUDE ,  BAEDOUILLET MICHEL ,  LIARDET PIERRE-YVAN ,  TEGLIA YANNICK

IPC: H04L9/18 ,  G06F12/14 ,  G06F21/00

Abstract: The method involves applying a ciphering algorithm with a function of a key specific to an integrated circuit of an initialization vector. A ciphered data is memorized, where the initialization vector includes a storage address of the data in a memory and a differentiation value. An algorithm identical to the ciphering algorithm is applied based on the address of the ciphered data. An independent claim is also included for a smart card comprising an electronic assembly.

公开(公告)号：DE602004013885D1

公开(公告)日：2008-07-03

申请号：DE602004013885

申请日：2004-06-10

Applicant: ST MICROELECTRONICS SA

Inventor： BARDOUILLET MICHEL ,  ORLANDO WILLIAM ,  MALHERBE ALEXANDRE ,  ANGUILLE CLAUDE

IPC: G06F7/58 ,  H03K3/84

Abstract: The circuit has an input shift register (41) to receive bits flow and a comparator (42) to compare content of the register with predetermined patterns stored in a table (43). A load detector (44) detects overflow of counters with respect to a determined threshold. The detector provides the result to condition the state of a word or randomness validation bit of bit stream provided by random number generator.

公开(公告)号：DE602004002241T2

公开(公告)日：2007-07-19

申请号：DE602004002241

申请日：2004-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COURCAMBECK STEPHAN ,  ANGUILLE CLAUDE

IPC: G06F12/14 ,  G06F1/00 ,  G06F12/10 ,  G06F21/53 ,  G06F21/62

公开(公告)号：DE602004002241D1

公开(公告)日：2006-10-19

申请号：DE602004002241

申请日：2004-04-01

Applicant: ST MICROELECTRONICS SA

Inventor： COURCAMBECK STEPHAN ,  ANGUILLE CLAUDE

IPC: G06F12/14 ,  G06F1/00 ,  G06F12/10 ,  G06F21/53 ,  G06F21/62

公开(公告)号：FR2846462A1

公开(公告)日：2004-04-30

申请号：FR0213457

申请日：2002-10-28

Applicant: ST MICROELECTRONICS SA

Inventor： WUIDART LUC ,  ANGUILLE CLAUDE

IPC: G06F7/60 ,  H03M7/16 ,  G11C17/08 ,  G06M3/12 ,  G11C17/14

公开(公告)号：FR2838894A1

公开(公告)日：2003-10-24

申请号：FR0204918

申请日：2002-04-19

Applicant: ST MICROELECTRONICS SA

Inventor： COURCAMBECK STEPHAN ,  ANGUILLE CLAUDE

IPC: G06F21/72 ,  H04L9/18 ,  H04L9/28 ,  H04L9/32

Abstract: The integrated processor coding chops digital word streams into predetermined sizes and generates key codes (Cb) generated pseudo randomly (10). The codes operate from a key function (K) and vector initialisation (IV) which changes for each block. The digital word blocks and key codes are combined continuously and memorised in a memory (23).