公开(公告)号：FR2855902B1

公开(公告)日：2005-08-26

申请号：FR0306751

申请日：2003-06-04

Applicant: ST MICROELECTRONICS SA

Inventor： GENEVAUX FRANCK ,  JACQUET FRANCOIS

IPC: G11C7/06 ,  G11C7/12

Abstract: A sense amplifier connected to first and second bit lines, comprising means for precharging said bit lines to a high voltage, means for connecting one or the other of the bit lines to a memory cell, said connection causing according to the state of the memory cell a maintaining of the bit line at the high voltage or a voltage reduction, first and second transistors respectively controlled by the first and second bit lines, and, in series with the first and second transistors, a controllable means for the current through the transistor controlled by the bit line connected to the memory cell to be greater than the current through the other transistor when the voltages of the two bit lines are at the high voltage.

公开(公告)号：FR2857149A1

公开(公告)日：2005-01-07

申请号：FR0307983

申请日：2003-07-01

Applicant: ST MICROELECTRONICS SA

Inventor： FREY CHRISTOPHE ,  GENEVAUX FRANCK

IPC: G11C7/06 ,  G11C7/14 ,  G11C7/08

Abstract: The circuit has a memory device with a dummy path having a reference column with two reference bit lines (blfdum, bltdum). One of two reference memory cells is activated by a dummy word line and is programmed to discharge the line (bltdum). The line (blfdum) that is discharged by drain currents of access transistors in their off state controls activation of a read amplifier. The other memory cell is programmed with data opposed to that in the former cell. An independent claim is also included for a procedure for controlling reader amplifiers.