11.
    发明专利
    未知

    公开(公告)号:DE69809710D1

    公开(公告)日:2003-01-09

    申请号:DE69809710

    申请日:1998-04-03

    Abstract: A sigma-delta modulator of second or higher order, comprising two or more integrating stages (A), a comparator (Comp) in cascade to the integration stages, generating a signal of logic level +1 when the input signal is positive or of logic value -1 when the input signal is negative, regardless of its absolute value, a feedback line comprising at least a low-pass filter (B) and adder means adding a feedback signal, filtered by the low-pass filter (B) to the signal output by the last of the integrating stages (A), further comprises a second comparator (Comp2) having an input connected in common to the input of the first comparator (Comp) and outputting a logic signal of positive value when the input signal is positive and of negative value when the input signal is negative, but of increasing logic level when the input signal exceeds one or more predefined thresholds of increasing value and the output logic signal being fed to the input of the low-pass filter (B).

    12.
    发明专利
    未知

    公开(公告)号:DE69710467T2

    公开(公告)日:2002-11-07

    申请号:DE69710467

    申请日:1997-10-23

    Abstract: Generation of symmetrical temperature compensated reference voltages in mixed type integrated circuits with a superior PSRR includes the use of a voltage-to-current conversion stage of a temperature independent bandgap voltage for producing eventually a differential pair of currents that are input to a pair of transresistance feedback operational amplifiers the feedback resistors of which are integrated in an interlaced form with a resistor employed in said conversion stage.

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