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公开(公告)号:ITRM20000425D0
公开(公告)日:2000-07-31
申请号:ITRM20000425
申请日:2000-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: CUSINATO PAOLO , BASCHIROTTO ANDREA , PASOLINI FABIO
IPC: H03M3/00
Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.
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公开(公告)号:ITMI20001071D0
公开(公告)日:2000-05-16
申请号:ITMI20001071
申请日:2000-05-16
Applicant: ST MICROELECTRONICS SRL
Inventor: BASCHIROTTO ANDREA , CUSINATO PAOLO , COLONNA VITTORIO , GANDORFI GABRIELE
IPC: G05F3/24
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公开(公告)号:DE60018573D1
公开(公告)日:2005-04-14
申请号:DE60018573
申请日:2000-10-25
Applicant: ST MICROELECTRONICS SRL
Inventor: CUSINATO PAOLO , BASCHIROTTO ANDREA
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公开(公告)号:ITTO20010538A1
公开(公告)日:2002-12-05
申请号:ITTO20010538
申请日:2001-06-05
Applicant: ST MICROELECTRONICS SRL
Inventor: BRUCCOLERI MELCHIORRE , BASCHIROTTO ANDREA , CUSINATO PAOLO
IPC: H03F3/45
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公开(公告)号:IT1313392B1
公开(公告)日:2002-07-23
申请号:ITVA990022
申请日:1999-07-19
Applicant: ST MICROELECTRONICS SRL
Inventor: GANDOLFI GABRIELE , COLONNA VITTORIO , CUSINATO PAOLO
IPC: H03M3/00
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公开(公告)号:ITRM20000425A1
公开(公告)日:2002-01-31
申请号:ITRM20000425
申请日:2000-07-31
Applicant: ST MICROELECTRONICS SRL
Inventor: CUSINATO PAOLO , BASCHIROTTO ANDREA , PASOLINI FABIO
IPC: H03M3/00
Abstract: A method of re-establishing the stability of a sigma-delta modulator having a plurality of integrator stages in cascade and a quantizer, achieving very short resetting times, a bit sequence corresponding to an instability state of the modulator is defined, the bit-stream output by the modulator is monitored to check whether it includes the instability sequence and, if the instability sequence is detected, the last integrator stage is reset and one or more preceding integrator stages are reset, progressively, until the instability sequence is no longer detected.
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公开(公告)号:ITMI20000468D0
公开(公告)日:2000-03-09
申请号:ITMI20000468
申请日:2000-03-09
Applicant: ST MICROELECTRONICS SRL
Inventor: BASCHIROTTO ANDREA , CUSINATO PAOLO , GANDOLFI GABRIELE , COLONNA VITTORIO
Abstract: A class AB single-stage operational amplifier having input decoupler stages for voltage signals, a voltage repeater stage, biasing transistors and bias current generators for the input decoupler stages, and capacitors placed between the input decoupler stages and the voltage repeater stage so as to increase the phase margin.
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公开(公告)号:DE60024246D1
公开(公告)日:2005-12-29
申请号:DE60024246
申请日:2000-06-23
Applicant: ST MICROELECTRONICS SRL
Inventor: COLONNA VITTORIO , BASCHIROTTO ANDREA , CUSINATO PAOLO , GANDOLFI GABRIELE
IPC: H03F3/45
Abstract: The present invention refers to a completely differential operational amplifier of the folded cascode type. In one embodiment the completely differential operational amplifier of the folded cascode type comprises: a differential output stage (15, 16, 17, 18, 19, 20 21, 22); a differential input stage (11, 12) able to drive said output stage (15, 16, 17, 18, 19, 20 21, 22); said differential output stage (15, 16, 17, 18, 19, 20 21, 22) includes a first branch (15, 16, 17, 18) having at least a first (16) and a second (17) transistor, and a second branch (19, 20 21, 22) having at least a third (20) and a fourth (21) transistor; said first (15, 16, 17, 18) and second (19, 20 21, 22) branch are coupled to a first (VDD) and to a second (GND) feeding voltage; a feedback circuit (40) of said first (16), second (17), third (20) and fourth (21) transistors; characterized in that said feedback circuit (40) is constituted by a single amplifier (40) having four inputs (IN1, IN2, IN3, IN4) and four outputs (OUT1, OUT2, OUTS, OUT4), said four inputs (IN1, IN2, IN3, IN4) take the voltage present on a terminal (23, 13, 24, 14) of said first (16), second (17), third (20) and fourth (21) transistors, and said four outputs (OUT1, OUT2, OUT3, OUT4) provide each a voltage to the control elements of said first (16), second (17), third (20) and fourth (21) transistors, which depend on the value of the input voltage of said four inputs (IN1, IN2, IN3, IN4).
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公开(公告)号:ITVA990022A1
公开(公告)日:2001-01-19
申请号:ITVA990022
申请日:1999-07-19
Applicant: ST MICROELECTRONICS SRL
Inventor: GANDOLFI GABRIELE , COLONNA VITTORIO , CUSINATO PAOLO
IPC: H03M3/00
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公开(公告)号:ITMI990947A1
公开(公告)日:2000-11-03
申请号:ITMI990947
申请日:1999-05-03
Applicant: ST MICROELECTRONICS SRL
Inventor: CUSINATO PAOLO , GANDOLFI GABRIELE , COLONNA VITTORIO , TONIETTO DAVIDE
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