公开(公告)号：DE69834329D1

公开(公告)日：2006-06-01

申请号：DE69834329

申请日：1998-11-13

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA ,  FRATTINI GIOVANNI ,  PEDRAZZINI GIORGIO ,  RICOTTI GIULIO

IPC: H01L41/04 ,  H02N2/06 ,  H03F3/30

公开(公告)号：IT1308711B1

公开(公告)日：2002-01-10

申请号：ITMI990317

申请日：1999-02-17

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA ,  FRATTINI GIOVANNI ,  RICOTTI GIULIO

Abstract: A switching device having a first and a second electronic switch connected in a half-bridge configuration and each having a control terminal for receiving a switching signal alternatively having a turn-on value and a turn-off value for taking the first and second electronic switches to an on state and to an off state, respectively; the switching device includes, for each switch, means for detecting the state of the switch and means for keeping the switching signal at the turn-off value for one of the electronic switches when the detected state of the other electronic switch is the on state.

公开(公告)号：ITTO20000991A1

公开(公告)日：2002-04-20

申请号：ITTO20000991

申请日：2000-10-20

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA

IPC: H02M3/07

Abstract: A capacitive high voltage generator having a first stage and a second stage respectively formed by a first basic block and a second basic block and a third basic block. Each basic block has a timing input, a first supply input, a second supply input and an output terminal and includes: a buffer having a first terminal connected to the first supply input of the corresponding basic block, a second terminal connected to a ground terminal and an input terminal connected to the timing input of the corresponding basic block; a capacitor having a first terminal connected to an output terminal of the corresponding buffer and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block; a diode having a first terminal connected to the second supply input and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block. The output terminals of the first and second basic blocks are respectively connected to the first supply input and to the second supply input of the third basic block.

公开(公告)号：ITMI20001999D0

公开(公告)日：2000-09-14

申请号：ITMI20001999

申请日：2000-09-14

Applicant: ST MICROELECTRONICS SRL

Inventor： CHRAPPAN SOLDAVINI FRANCESCO ,  FONTANELLA LUCA

IPC: H02M1/08 ,  H02M3/158 ,  H02P6/18 ,  H03K5/1536

Abstract: The present invention relates a current zero crossing detecting circuit including a PWM driving half bridge circuit, which generates an output signal (OUT) and a signal synchronous with the high impedance condition of said PWM driving half bridge circuit. Said inventive circuit has the characteristic of comprising detecting means (DFLIP, COMP) synchronous with said signal synchronous with the high impedance condition of said PWM driving half bridge circuit and said output signal (OUT), and said detecting means generating a direction signal (DIR_COR) showing the current direction flowing in said pulse width modulation circuit.

公开(公告)号：ITMI990317A1

公开(公告)日：2000-08-17

申请号：ITMI990317

申请日：1999-02-17

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA ,  FRATTINI GIOVANNI ,  RICOTTI GIULIO

Abstract: A switching device having a first and a second electronic switch connected in a half-bridge configuration and each having a control terminal for receiving a switching signal alternatively having a turn-on value and a turn-off value for taking the first and second electronic switches to an on state and to an off state, respectively; the switching device includes, for each switch, means for detecting the state of the switch and means for keeping the switching signal at the turn-off value for one of the electronic switches when the detected state of the other electronic switch is the on state.

公开(公告)号：IT201900000082A1

公开(公告)日：2020-07-04

申请号：IT201900000082

申请日：2019-01-04

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA ,  LABOMBARDA ANDREA ,  BIANCO MARCO ,  GHEZZI DAVIDE ,  RAINERI CHRISTIAN ,  GATTI PAOLO

公开(公告)号：DE60125513T2

公开(公告)日：2007-10-04

申请号：DE60125513

申请日：2001-05-17

Applicant: ST MICROELECTRONICS SRL ,  HEWLETT PACKARD CO

Inventor： FONTANELLA LUCA

IPC: H02M3/158

Abstract: The DC-DC converter (100) comprises an inductor (101) connected between a supply line (104) and a ground line (105) through a switching MOS transistor (102); and a voltage multiplying circuit (103) formed by a plurality of voltage multiplying stages (107.1, 107.2) of capacitive type, connected together in cascade and each having an input connected to an intermediate node (106) between the inductor (101) and the MOS transistor (102), and an output supplying a potential (VH1, VH2) equal to the potential (V1) of the intermediate node (106) multiplied by a respective multiplication factor. Each voltage multiplying stage (107.1, 107.2) comprises a plurality of parallel, selectively connectable boosting branches (108.1-108.4, 109.1-109.4). The number of the active boosting branches (108.1-108.4, 109.1-109.4) is determined according to the energy required by the loads (120.1, 120.2).

公开(公告)号：ITTO20050628A1

公开(公告)日：2007-03-16

申请号：ITTO20050628

申请日：2005-09-15

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA ,  PASOLINI FABIO

公开(公告)号：IT1320718B1

公开(公告)日：2003-12-10

申请号：ITTO20000991

申请日：2000-10-20

Applicant: ST MICROELECTRONICS SRL

Inventor： FONTANELLA LUCA

IPC: H02M3/07

Abstract: A capacitive high voltage generator having a first stage and a second stage respectively formed by a first basic block and a second basic block and a third basic block. Each basic block has a timing input, a first supply input, a second supply input and an output terminal and includes: a buffer having a first terminal connected to the first supply input of the corresponding basic block, a second terminal connected to a ground terminal and an input terminal connected to the timing input of the corresponding basic block; a capacitor having a first terminal connected to an output terminal of the corresponding buffer and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block; a diode having a first terminal connected to the second supply input and a second terminal connected, in a non-disconnectable way, to the output terminal of the corresponding basic block. The output terminals of the first and second basic blocks are respectively connected to the first supply input and to the second supply input of the third basic block.

公开(公告)号：IT1318856B1

公开(公告)日：2003-09-10

申请号：ITMI20001999

申请日：2000-09-14

Applicant: ST MICROELECTRONICS SRL

Inventor： CHRAPPAN SOLDAVINI FRANCESCO ,  FONTANELLA LUCA

IPC: H02M1/08 ,  H02M3/158 ,  H02P6/18 ,  H03K5/1536

Abstract: The present invention relates a current zero crossing detecting circuit including a PWM driving half bridge circuit, which generates an output signal (OUT) and a signal synchronous with the high impedance condition of said PWM driving half bridge circuit. Said inventive circuit has the characteristic of comprising detecting means (DFLIP, COMP) synchronous with said signal synchronous with the high impedance condition of said PWM driving half bridge circuit and said output signal (OUT), and said detecting means generating a direction signal (DIR_COR) showing the current direction flowing in said pulse width modulation circuit.